IN-CELL TOUCH PANEL AND DISPLAY DEVICE

• US 20160266677A1
• Filed: 09/23/2014
• Published: 09/15/2016
• Est. Priority Date: 05/30/2014
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Inventors: LIU, Yingming, DONG, Xue, XUE, Hailin, WANG, Haisheng, ZHAO, Weijie, YANG, Shengji, DING, Xiaoliang, LIU, Hongjuan
• Granted Patent: US 10,409,425 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 2203/04107 Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds
• CPC Class Codes: G06F 2203/04112 Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes

Abstract

An in-cell touch panel and a display device are provided, and the in-cell touch panel includes: an upper substrate and a lower substrate arranged oppositely to each other; a plurality of self-capacitance electrodes arranged in a same layer and insulated from each other at a side, facing the lower substrate, of the upper substrate or a side, facing the upper substrate, of the lower substrate; a shielding electrode provided at a side, facing the lower substrate, of each of the self-capacitance electrodes, which is insulated from the shielding electrode; and an insulating layer arranged between each of the self-capacitance electrodes and the shielding electrode. Such an in-cell touch panel may isolate the touch detection signals applied to the self-capacitance electrodes from the display signals, so as to avoid mutual interference therebetween.

Claims

1. An in-cell touch panel, comprising:

an upper substrate and a lower substrate arranged oppositely to each other;

a plurality of self-capacitance electrodes arranged in a same layer and insulated from each other at a side, facing the lower substrate, of the upper substrate or a side, facing the upper substrate, of the lower substrate;

a shielding electrode provided at a side, facing the lower substrate, of each of the self-capacitance electrodes, wherein each of the self-capacitance electrodes is insulated from the shielding electrode; and

an insulating layer provided between each of the self-capacitance electrodes and the shielding electrode.

2. The in-cell touch panel according to claim 1, further comprising:

a touch detection chip configured to determine a touch position by detecting variation of capacitance value of each of the self-capacitance electrodes.

3. The in-cell touch panel according to claim 1, further comprising:

a black matrix layer provided at the side, facing the lower substrate, of the upper substrate or the side, facing the upper substrate, of the lower substrate;

wherein an orthographic projection, upon the lower substrate, of a pattern of each of the self-capacitance electrodes and an orthographic projection, upon the lower substrate, of a pattern of the shielding electrode are arranged within an area where a pattern of the black matrix layer is arranged.

4. The in-cell touch panel according to claim 3, wherein the orthographic projection, upon the lower substrate, of the pattern of each of the self-capacitance electrodes and the orthographic projection, upon the lower substrate, of the pattern of the shielding electrode are respectively of a lattice structure within the area where the pattern of the black matrix layer is arranged.

5. The in-cell touch panel according to claim 3, further comprising:

at least one conductive wire being electrically connected with and corresponding, in a one-to-one manner, to each of the self-capacitance electrodes, and at least one conductive node corresponding to the self-capacitance electrode in a one-to-one manner;

wherein

the conductive wire each has an orthographic projection, upon the lower substrate, arranged in the area where the pattern of the black matrix layer is arranged, and the conductive node each is provided within an area where a frame sealant of the in-cell touch panel is arranged; and

each of the self-capacitance electrodes is connected to the conductive node through the conductive wire, and then is electrically connected with a connection terminal of the touch detection chip through a leading wire arranged within the area where the frame sealant is arranged.

6. The in-cell touch panel according to claim 5, wherein the conductive wire and each of the self-capacitance electrode are provided in a same layer;

and

the orthographic projection, upon the lower substrate, of the pattern of the shielding electrode covers the pattern of the conductive wire and the pattern of each of the self-capacitance electrodes.

7. The in-cell touch panel according to claim 5, wherein the conductive wire is arranged in a same layer as the shielding electrode, and each of the self-capacitance electrodes is electrically connected with the conductive wire that the self-capacitance electrode corresponds to, through a via hole within the insulating layer;

and

the orthographic projection, upon the lower substrate, of the pattern of the shielding electrode and the orthographic projection, upon the lower substrate, of the pattern of the conductive wire cover the patterns of each of the self-capacitance electrodes.

8. The in-cell touch panel according to claim 7, wherein the black matrix layer is arranged at the side, facing the lower substrate, of the upper substrate, a color filter layer is provided on the black matrix layer, a planarization layer is provided on the color filter layer, and a spacer layer is provided on the planarization layer;

and

each of the self-capacitance electrodes is arranged between the black matrix layer and the color filter layer, the conductive wire and the shielding electrode are arranged between the color filter layer and the planarization layer, and the color filter layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode;

or

each of the self-capacitance electrodes is arranged between the color filter layer and the planarization layer, the conductive wire and the shielding electrode are arranged between the planarization layer and the spacer layer, and the planarization layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode;

or

each of the self-capacitance electrodes is arranged between the planarization layer and the spacer layer, the conductive wire and the shielding electrode are arranged on the spacer layer, and the spacer layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode.

9. The in-cell touch panel according to claim 7, the lower substrate is provided with a common electrode layer thereon, a passivation layer is arranged on the common electrode layer, and a pixel electrode layer is provided on the passivation layer;

and

each of the self-capacitance electrodes is arranged on the passivation layer, the conductive wire and the shielding electrode are arranged between the common electrode layer and the passivation layer, and the passivation layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode.

10. The in-cell touch panel according to claim 2, wherein the touch detection chip is configured to operate during both a display time period and a touch time period of each frame, or operate only during the touch time period of each frame.

12. The in-cell touch panel according to claim 1, further comprising:

a black matrix layer provided at the side, facing the lower substrate, of the upper substrate or the side, facing the upper substrate, of the lower substrate;

wherein an orthographic projection, upon the lower substrate, of a pattern of each of the self-capacitance electrodes and an orthographic projection, upon the lower substrate, of a pattern of the shielding electrode are arranged within an area where a pattern of the black matrix layer is arranged.

13. The in-cell touch panel according to claim 12, wherein the orthographic projection, upon the lower substrate, of the pattern of each of the self-capacitance electrodes and the orthographic projection, upon the lower substrate, of the pattern of the shielding electrode are respectively of a lattice structure within the area where the pattern of the black matrix layer is arranged.

14. The in-cell touch panel according to claim 4, further comprising:

at least one conductive wire being electrically connected with and corresponding, in a one-to-one manner, to each of the self-capacitance electrodes, and at least one conductive node corresponding to the self-capacitance electrode in a one-to-one manner;

wherein

the conductive wire each has an orthographic projection, upon the lower substrate, arranged in the area where the pattern of the black matrix layer is arranged, and the conductive node each is provided within an area where a frame sealant of the in-cell touch panel is arranged; and

each of the self-capacitance electrodes is connected to the conductive node through the conductive wire, and then is electrically connected with a connection terminal of the touch detection chip through a leading wire arranged within the area where the frame sealant is arranged.

15. The in-cell touch panel according to claim 14, wherein the conductive wire and each of the self-capacitance electrode are provided in a same layer;

and

the orthographic projection, upon the lower substrate, of the pattern of the shielding electrode covers the pattern of the conductive wire and the pattern of each of the self-capacitance electrodes.

16. The in-cell touch panel according to claim 14, wherein the conductive wire is arranged in a same layer as the shielding electrode, and each of the self-capacitance electrodes is electrically connected with the conductive wire that the self-capacitance electrode corresponds to, through a via hole within the insulating layer;

and

the orthographic projection, upon the lower substrate, of the pattern of the shielding electrode and the orthographic projection, upon the lower substrate, of the pattern of the conductive wire cover the patterns of each of the self-capacitance electrodes.

17. The in-cell touch panel according to claim 3, wherein the black matrix layer is arranged at the side, facing the lower substrate, of the upper substrate, a color filter layer is provided on the black matrix layer, a planarization layer is provided on the color filter layer, and a spacer layer is provided on the planarization layer;

and

each of the self-capacitance electrodes is arranged between the black matrix layer and the color filter layer, the conductive wire and the shielding electrode are arranged between the color filter layer and the planarization layer, and the color filter layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode;

or

each of the self-capacitance electrodes is arranged between the color filter layer and the planarization layer, the conductive wire and the shielding electrode are arranged between the planarization layer and the spacer layer, and the planarization layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode;

or

each of the self-capacitance electrodes is arranged between the planarization layer and the spacer layer, the conductive wire and the shielding electrode are arranged on the spacer layer, and the spacer layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode.

18. The in-cell touch panel according to claim 4, wherein the black matrix layer is arranged at the side, facing the lower substrate, of the upper substrate, a color filter layer is provided on the black matrix layer, a planarization layer is provided on the color filter layer, and a spacer layer is provided on the planarization layer;

and

each of the self-capacitance electrodes is arranged between the black matrix layer and the color filter layer, the conductive wire and the shielding electrode are arranged between the color filter layer and the planarization layer, and the color filter layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode;

or

each of the self-capacitance electrodes is arranged between the color filter layer and the planarization layer, the conductive wire and the shielding electrode are arranged between the planarization layer and the spacer layer, and the planarization layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode;

or

each of the self-capacitance electrodes is arranged between the planarization layer and the spacer layer, the conductive wire and the shielding electrode are arranged on the spacer layer, and the spacer layer acts as the insulating layer between the self-capacitance electrode and the shielding electrode.

19. The in-cell touch panel according to claim 8, wherein the touch detection chip is configured to operate during both a display time period and a touch time period of each frame, or operate only during the touch time period of each frame.

20. The in-cell touch panel according to claim 9, wherein the touch detection chip is configured to operate during both a display time period and a touch time period of each frame, or operate only during the touch time period of each frame.

11. A display device comprising an in-cell touch panel which comprises:

an upper substrate and a lower substrate arranged oppositely to each other;

a plurality of self-capacitance electrodes arranged in a same layer and insulated from each other at a side, facing the lower substrate, of the upper substrate or a side, facing the upper substrate, of the lower substrate;

a shielding electrode provided at a side, facing the lower substrate, of each of the self-capacitance electrodes, wherein each of the self-capacitance electrodes is insulated from the shielding electrode; and

an insulating layer provided between each of the self-capacitance electrodes and the shielding electrode.