DATA SHIFT BY ELEMENTS OF A VECTOR IN MEMORY
First Claim
1. A method, comprising:
- performing a shift operation on a first element stored in a first group of memory cells coupled to a first access line and a number of sense lines of a memory array,wherein the shift operation includes shifting the first element by a number of bit positions defined by a second element without transferring data via an input/output (I/O) line, wherein the second element is stored in a second group of memory cells coupled to a second access line and a the number of sense lines of the memory array.
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Abstract
Examples of the present disclosure provide apparatuses and methods for performing shift operations in a memory. An example method comprises performing a shift operation a first element stored in a first group of memory cells coupled to a first access line and a number of sense lines of a memory array and a second element stored in a second group of memory cells coupled to a second access line and the number of sense lines of the memory array. The method can include shifting the first element by a number of bit positions defined by the second element by performing a number of AND operations, OR operations, SHIFT operations, and INVERT operations performed without transferring data via an input/output (I/O) line.
127 Citations
32 Claims
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1. A method, comprising:
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performing a shift operation on a first element stored in a first group of memory cells coupled to a first access line and a number of sense lines of a memory array, wherein the shift operation includes shifting the first element by a number of bit positions defined by a second element without transferring data via an input/output (I/O) line, wherein the second element is stored in a second group of memory cells coupled to a second access line and a the number of sense lines of the memory array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An apparatus, comprising:
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a first group of memory cells coupled to a first access line and configured to store a first number of bits that represent a first element; a second group of memory cells coupled to the first access line and configured to store a second number of bits that represent a second element; a third group of memory cells coupled to a second access line and configured to store a third element; a fourth group of memory cells coupled to the second access line and configured to store a fourth element; and a controller configured to operate sensing circuitry to shift the first number of bits within the first group of memory cells by a first number of bit positions defined by the third element and shift the second number of bits within the second group of memory cells by a second number of bit positions defined by the fourth element by performing a number of operations without transferring data via an input/output (I/O) line. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A method for performing a number of shift operations, comprising:
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performing a shift operation on a first bit-vector comprising a first number of elements stored in a first group of memory cells coupled to a first access line and a number of sense lines of a memory array, wherein the shift operation includes shifting the first bit-vector by a number of bit positions defined by a second bit-vector without a sense line address access wherein the second bit-vector is stored in a second group of memory cells coupled to a second access line and the number of sense lines of the memory array; and storing a result of the shift operation as a result bit-vector stored in a third group of memory cells coupled to a third access line. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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32. An apparatus comprising:
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a first number of memory cells coupled to a number of sense lines and to a first access line, wherein the first number of memory cells are configured to store a first number of elements; a second number of memory cells coupled to the number of sense lines and to a second access line, wherein the second number of memory cells are configured to store a second number of elements; and a controller configured to operate sensing circuitry to; receive the first number of elements and the second number of elements; shift bits in each of the first number of elements within the first number of memory cells by a number of bit positions equal to a corresponding second number of elements using a number of operations, wherein a sense line address access is not performed to; receive the first number of elements and the second number of elements;
orshift using at least one of the number of operations.
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Specification