THERMALLY-ASSISTED COLD-WELD BONDING FOR EPITAXIAL LIFT-OFF PROCESS

• US 20160276520A1
• Filed: 11/11/2014
• Published: 09/22/2016
• Est. Priority Date: 11/11/2013
• Status: Abandoned Application

• Current Assignee: Board of Regents of the University of Michigan (University of Michigan)
• Original Assignee: Board of Regents of the University of Michigan (University of Michigan)
• Inventors: Forrest, Stephen R., Lee, Kyusang
• Application Number:
  US15/034,310
• Publication Number:
  US 20160276520A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H01L 31/1864 Annealing
• CPC Class Codes: H01L 31/1892 methods involving the use of temporary, removable substrates
• CPC Class Codes: H01L 31/1896 for thin-film semiconductors
• CPC Class Codes: Y02E 10/50 Photovoltaic [PV] energy

Abstract

A process for assembling a thin-film optoelectronic device is disclosed. The process may include providing a growth structure comprising a wafer having a growing surface, a sacrificial layer, and a device region. The process may further include providing a host substrate and depositing a first metal layer on the device region and depositing a second metal layer on the host substrate. The process may further include bonding the first metal layer to the second metal layer by pressing the first and second metal layers together at a bonding temperature, wherein the bonding temperature is above room temperature and below the lower of a glass transition temperature of the host substrate and a melting temperature of the host substrate.

Claims

1. A process for assembling a thin-film optoelectronic device comprising:

providing a growth structure comprising a wafer having a growing surface, a sacrificial layer, and a device region, wherein the sacrificial layer is disposed between the wafer and the device region, and wherein the device region has a surface furthest from the wafer;

providing a host substrate, wherein the host substrate comprises a polymer material;

depositing a first metal layer on the surface of the device region;

depositing a second metal layer on the host substrate;

bonding the first metal layer to the second metal layer by pressing the first and second metal layers together at a bonding temperature, wherein the bonding temperature is above room temperature and below the lower of a glass transition temperature of the host substrate and a melting temperature of the host substrate.

2. The process of claim 1, wherein the bonding temperature is a temperature within the range of 170°

-250°

C.

3. The process of claim 1 wherein the polymer material comprises a polyimide film.

4. The process of claim 1, wherein the bonding is performed under vacuum.

5. The process of claim 1, wherein the first and second metal layers are pressed together at a bonding pressure within 1 MPa and 40 MPa.

6. The process of claim 1, wherein the first and second metal layers independently comprise a noble metal.

7. The process of claim 1, wherein the first and second metal layers comprise the same noble metal.

8. The process of claim 7, wherein the noble metal is chosen from Au and Cu.

9. The process of claim 8, wherein the noble metal is Au and the bonding temperature is a temperature within the range of 50°

-280°

C.

10. The process of claim 1 wherein the first and second metal layers are pressed together for a time within the range of 1 second-20 minutes.

11. A process for assembling a thin-film optoelectronic device comprising:

providing a growth structure comprising a wafer having a growing surface, a sacrificial layer, and a device region, wherein the sacrificial layer is disposed between the wafer and the device region, and wherein the device region has a surface furthest from the wafer;

providing a host substrate, wherein the host substrate comprises a metal foil;

depositing a first metal layer on the surface of the device region;

depositing a second metal layer on the host substrate;

bonding the first metal layer to the second metal layer by pressing the first and second metal layers together at a bonding temperature, wherein the bonding temperature is above room temperature and below the lower of a melting temperature of the host substrate and 500°

C.

12. The process of claim 11, wherein the bonding temperature is above 150°

C. and less than 270°

C.

13. The process of claim 11, wherein the bonding is performed under vacuum.

14. The process of claim 11, wherein the first and second metal layers are pressed together at a bonding pressure within 1 MPa and 40 MPa.

15. The process of claim 11, wherein the first and second metal layers independently comprise a noble metal.

16. The process of claim 11, wherein the first and second metal layers comprise the same noble metal.

17. The process of claim 16, wherein the noble metal is chosen from Au and Cu.

18. The process of claim 17, wherein the noble metal is Au and the bonding temperature is a temperature within the range of 50°

-280°

C.

19. The process of claim 11, wherein the first and second metal layers are pressed together for a time within the range of 1 second-20 minutes.