SYSTEM AND METHOD FOR RIPPLE-FREE AC POWER DETERMINATION

• US 20160282391A1
• Filed: 03/26/2015
• Published: 09/29/2016
• Est. Priority Date: 03/26/2015
• Status: Active Grant

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: Microchip Technology Incorporated
• Inventors: Brumann, Michael, Quiquempoix, Vincent
• Granted Patent: US 10,197,605 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01R 21/003 Measuring reactive component
• CPC Class Codes: G01R 21/06 by measuring current and voltage G01R21/08 - G01R21/133 take precedence
• CPC Class Codes: G01R 21/1331 Measuring real or reactive component, measuring apparent energy
• CPC Class Codes: G01R 23/165 using filters
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03M 1/1245 Details of sampling arrangements or methods
• CPC Class Codes: H03M 1/36 simultaneously only, i.e. parallel type

Abstract

A power metering circuit includes a current input path for receiving an analog current input at a first analog to digital converter; a voltage input path for receiving an analog voltage input at a second analog to digital converter; a multiplier configured to multiply an output of the current input path and the voltage input path; a notch filter configured to receive an output of the multiplier, the notch filter having a stop band based on a line frequency; and a control circuit for setting a sampling frequency of the first analog to digital converter and the second analog to digital converter to a multiple of the line frequency.

Claims

1. A power metering circuit, comprising:

a current input path for receiving an analog current input at a first analog to digital converter;

a voltage input path for receiving an analog voltage input at a second analog to digital converter;

a multiplier configured to multiply an output of the current input path and the voltage input path;

a notch filter configured to receive an output of the multiplier, the notch filter having a stop band based on a line frequency; and

a control circuit for setting a sampling frequency of the first analog to digital converter and the second analog to digital converter to a multiple of the line frequency.

2. A power metering circuit in accordance with claim 1, wherein the control circuit includes a phase locked loop configured to receive one of the analog current input and the analog voltage input.

3. A power metering circuit in accordance with claim 1, wherein the control circuit comprises a frequency detector and a programmable oscillator configured to receive an output of the frequency detector.

4. A power metering circuit in accordance with claim 1, the current input path and the voltage input path each including a highpass filter.

5. A power metering circuit in accordance with claim 4, wherein the voltage input path includes a selectable phase shifter.

6. A power metering circuit in accordance with claim 1, including an output pulse width modulator.

7. A power metering circuit, comprising:

a first input path for receiving one of an analog current input or an analog voltage input at a first analog to digital converter;

a second input path for receiving another of the analog voltage input or the analog current input at a second analog to digital converter;

a multiplier configured to multiply an output of the first input path and the second input path; and

a notch filter configured to receive an output of the multiplier, the notch filter having a stop band based on a line frequency.

8. A power metering circuit in accordance with claim 7, further including a control circuit for setting a sampling frequency of the first analog to digital converter and the second analog to digital converter to a multiple of the line frequency.

9. A power metering in accordance with claim 8, wherein the control circuit includes a phase locked loop configured to receive one of the analog current input and the analog voltage input.

10. A power metering circuit in accordance with claim 8, wherein the control circuit comprises a frequency detector and a programmable oscillator configured to receive an output of the frequency detector.

11. A power metering circuit in accordance with claim 7, the first input path and the second input path each including a highpass filter.

12. A power metering circuit in accordance with claim 11, wherein the first input path includes a selectable phase shifter.

13. A power metering circuit in accordance with claim 7, including an output pulse width modulator.

14. A method, comprising:

receiving an analog current input at a first analog to digital converter;

receiving an analog voltage input at a second analog to digital converter;

multiplying an output of the current input path and the voltage input path;

notch filtering an output of the multiplier with a stop band based on a line frequency; and

setting a sampling frequency of the first analog to digital converter and the second analog to digital converter to a multiple of the line frequency.

15. A method in accordance with claim 14, wherein setting the sampling frequency includes using a phase locked loop configured to receive one of the analog current input and the analog voltage input.

16. A method in accordance with claim 15, wherein setting the sampling frequency comprises using a frequency detector and a programmable oscillator configured to receive an output of the frequency detector.

17. A method in accordance with claim 14, the current input path and the voltage input path each including a highpass filter.

18. A method in accordance with claim 17, wherein the voltage input path includes a selectable phase shifter.