VOLTAGE CONTROL USING RECTIFYING CIRCUITRY

• US 20160285277A1
• Filed: 03/25/2015
• Published: 09/29/2016
• Est. Priority Date: 03/25/2015
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Joehren, Michael
• Granted Patent: US 9,843,198 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H02J 50/10 using inductive coupling
• CPC Class Codes: H02J 50/12 of the resonant type
• CPC Class Codes: H02M 1/008 Plural converter units for generating at two or more independent and non-parallel outputs, e.g. systems with plural point of load switching regulators
• CPC Class Codes: H02M 7/23 arranged for operation in parallel H02M7/2176 takes precedence

Abstract

Aspects of the present disclosure are directed to methods, apparatuses and systems involving voltage control using rectifying circuitry. According to an example embodiment, an apparatus includes an antenna, a capacitor, and voltage control circuitry. The voltage control circuitry includes a first rectifying circuit to rectify a wireless signal and provide the rectified signal to an output load, a second rectifying circuit to rectify the wireless signal and provide the rectified signal to the capacitor, and a control logic circuit to regulate an output voltage provided to the output load relative to a threshold value. For each rectifying cycle, the control logic circuit determines whether the output voltage is above the threshold value, enables, in response to determining that the output voltage is below the threshold value, the first rectifying circuit, and enables, in response to determining that the output voltage is above the threshold value, the second rectifying circuit.

Claims

1. An apparatus comprising:

an antenna;

a capacitor; and

voltage control circuitry including;

a first rectifying circuit configured and arranged to rectify a wireless signal received by the antenna and to provide the rectified signal to an output load;

a second rectifying circuit configured and arranged to rectify the wireless signal received by the antenna and to provide the rectified signal to the capacitor; and

a control logic circuit configured and arranged to regulate an output voltage provided to the output load relative to a threshold voltage value, and, for each rectifying cycle,

determine whether the output voltage is above the threshold voltage value or above the threshold voltage value;

enable, in response to determining that the output voltage is below the threshold voltage value, the first rectifying circuit to provide the rectified signal to the output load; and

enable, in response to determining that the output voltage is above the threshold voltage value, the second rectifying circuit to provide the rectified signal to the capacitor.

2. The apparatus of claim 1, wherein the control logic circuit is configured and arranged to determine that the output voltage is below the threshold voltage value for a current rectifying cycle based on a value of the output voltage during a preceding rectifying cycle, the current rectifying cycle being later in time than the preceding rectifying cycle.

3. The apparatus of claim 1, wherein the voltage control circuitry is configured and arranged to synchronously regulate the output voltage with rectification of the wireless signal.

4. The apparatus of claim 1, wherein the voltage control circuitry further includes a reference adjustment circuit configured and arranged to shift a reference point of the wireless signal received by the antenna.

5. The apparatus of claim 4, wherein the control logic is configured and arranged to enable a first transistor of the reference adjustment circuit based on detecting a first phase of the wireless signal, and to enable a second transistor of the reference adjustment circuit based on detecting a second phase of the wireless signal.

6. The apparatus of claim 1, further including another capacitor configured and arranged to accumulate voltage output from the first rectifying circuit and to output the accumulated voltage to the output load.

7. The apparatus of claim 1, wherein the capacitor is configured and arranged to adjust an impedance of the capacitor over time in response to one or more rectified signals provided to the capacitor.

8. An apparatus comprising:

an antenna;

a capacitor; and

voltage regulator circuitry including;

a first rectifying circuit configured and arranged to rectify a wireless signal received by the antenna and to provide the rectified signal to an output load;

a second rectifying circuit configured and arranged to rectify the wireless signal received by the antenna and to provide the rectified signal to the capacitor; and

a control logic circuit configured and arranged to regulate an output voltage provided to the output load relative to a threshold voltage value, and, for each rectifying cycle associated with a half-wave of the wireless signal,

compare the output voltage to a threshold voltage value;

in response to the voltage being below the threshold voltage value, enable one of a first path and a second path of the first rectifying circuit to provide the rectified signal to the output load; and

in response the voltage being above the threshold voltage value, enable one of a third path and a fourth path of the second rectifying circuit to provide the rectified signal to the capacitor.

9. The apparatus of claim 8, wherein the control logic circuit is configured and arranged to determine the output voltage based on a value of the output voltage during a preceding rectifying cycle, the preceding rectifying cycle being earlier in time than a current rectifying cycle.

10. The apparatus of claim 8, wherein the apparatus is configured and arranged to pre-charge the capacitor to a same voltage level as another capacitor associated with the output load.

11. The apparatus of claim 8, further including another capacitor configured and arranged to low-pass filter the output voltage.

12. The apparatus of claim 8, wherein the capacitor is configured and arranged to adjust an effective impedance of the capacitor in response to the receiving the provided rectified signal.

13. The apparatus of claim 8, wherein the voltage regulator circuit further includes:

a reference adjustment circuit configured and arranged to shift a reference point of the wireless signal,

wherein the control logic circuit is configured and arranged to selectively shift a reference point for the wireless signal based on a polarity of the wireless signal.

14. The apparatus of claim 8, wherein the control logic circuit is configured and arranged to change an enabled path for each rectifying cycle synchronously with a beginning of a particular rectifying cycle of the wireless signal.

15. An apparatus comprising:

an antenna configured and arranged to receive wireless signals;

a capacitor configured and arranged to accumulate voltage; and

voltage control circuitry including;

a first rectifying circuit configured and arranged to rectify a wireless signal received by the antenna and to provide the rectified signal to an output load, the first rectifying circuit including;

a first rectifying path through a first transistor, and configured and arranged to provide the rectified signal to the output load; and

a second rectifying path through a second transistor, and configured and arranged to provide the rectified signal to an output load;

a second rectifying circuit configured and arranged to rectify the wireless signal and to provide the rectified signal to the capacitor, the second rectifying circuit including;

a third rectifying path through a third transistor, and configured and arranged to provide the rectified signal to the capacitor; and

a fourth rectifying path through a fourth transistor, and configured and arranged to provide the rectified signal to the capacitor; and

a control logic circuit configured and arranged to regulate an output voltage provided to the output load relative to a threshold voltage value, and for each rectifying cycle associated with a half-wave of the wireless signal,

determine if the output voltage is below the threshold voltage value;

enable, in response to the output voltage being below the threshold voltage value, one of the first and second rectifying paths to provide the rectified signal to the output load; and

enable, in response to the output voltage being above the threshold voltage value, one of the third and fourth rectifying paths to provide the rectified signal to the capacitor.

16. The apparatus of claim 15, wherein the control logic circuit is configured and arranged to determine if a value of the output voltage during a first rectifying cycle is below a threshold voltage value, and

enable, in response to the value of the output voltage during the first rectifying cycle being below the threshold voltage value, one of the first and second rectifying paths to provide the rectified signal to the output load for a second rectifying cycle.

17. The apparatus of claim 15, wherein the control circuit logic is configured and arranged to determine if a value of the output voltage during a first rectifying cycle is below a threshold voltage value, and enable, in response to the value of the output voltage during the first rectifying cycle being above the threshold voltage value, one of the second and third rectifying paths to provide the rectified signal to the capacitor for a second rectifying cycle.

18. The apparatus of claim 15, wherein the controller is configured and arranged to select one of the first rectifying circuit and the second rectifying circuit for a second rectifying cycle during first rectifying cycle, the first rectifying cycle including a preceding cycle from the second rectifying cycle.

19. The apparatus of claim 15, wherein the first, second, third, and fourth transistors are further configured and arranged with a back gate control, each of the back gate controls being configured and arranged to prevent uncontrolled current from flowing through the respective transistor.

20. The apparatus of claim 15, wherein the first, second, third, and fourth transistors are further configured and arranged with two additional transistors, each of the two additional transistors being configured and arranged to prevent uncontrolled current from flowing through the respective first, second, third, and fourth transistor.