LIGHT EMITTING DIODES AND METHODS WITH ENCAPSULATION

• US 20160293811A1
• Filed: 03/31/2016
• Published: 10/06/2016
• Est. Priority Date: 03/31/2015
• Status: Active Application

• Current Assignee: Creeled Incorporated
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Zhenyu, Zhong, Hussell, Christopher P.
• Application Number:
  US15/087,641
• Publication Number:
  US 20160293811A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2933/005 relating to encapsulations
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/52 Encapsulations
• CPC Class Codes: H01L 33/56 Materials, e.g. epoxy or silicone resin
• CPC Class Codes: H01L 33/58 Optical field-shaping elements
• CPC Class Codes: H01L 33/60 Reflective elements
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

Solid state lighting apparatuses, systems, and related methods are provided. An example apparatus can include one or more light emitting diodes (LEDs) and a dark or black encapsulation layer surrounding and/or disposed between the one or more LEDs. The apparatus can include, e.g., a substrate or a leadframe for mounting the LEDs. A method for producing a panel of LEDs can include joining the LEDs to the panel, e.g., by bump bonding, and flooding the panel with dark or black encapsulation material so that the LED chips are surrounded by the dark or black encapsulation material.

Claims

1. A light emitting diode (LED) apparatus comprising:

one or more light emitting diodes (LEDs); and

a dark encapsulation layer, surrounding or between the one or more LEDs or both surrounding and between the one or more LEDs, and in contact with the one or more LEDs or less than 200 μ

m away from the one or more LEDs.

2. The apparatus of claim 1, comprising a substrate and a plurality of electrically conductive bottom traces disposed over the substrate, and wherein the electrically conductive bottom traces cover at least 45% of a bottom area of the substrate.

3. The apparatus of claim 1, comprising a substrate and a plurality of electrically conductive traces disposed over the substrate, wherein at least one LED is electrically connected to at least two of the electrically conductive traces using tin-silver-copper (SAC) solder.

4. The apparatus of claim 1, wherein the dark encapsulation layer surrounds the LEDs on four or more sides, is disposed between each of the LEDs, and is in contact with each of the LEDs.

5. The apparatus of claim 1, wherein the dark encapsulation layer comprises a silicone or an epoxy and is made dark by using pigments including carbon or iron oxide.

6. The apparatus of claim 1, wherein the dark encapsulation layer surrounds each of the LEDs and one side of the apparatus is flush with a plane defined by light transmitting surfaces of the LEDs.

7. The apparatus of claim 1, wherein each LED faces outwards from a light-emitting side of the apparatus, and wherein the light-emitting side of the apparatus comprises a surface that is substantially dark.

8. The apparatus of claim 1, comprising a layer of white encapsulation material.

9. The apparatus of claim 8, wherein the layer of white encapsulation material is substantially flush with a plurality of top sides of the LEDs.

10. The apparatus of claim 9, wherein both the dark encapsulation layer and the layer of white encapsulation material are substantially flush with the top sides of the LEDs, so that the dark encapsulation layer and the layer of white encapsulation material are coplanar within +/−

25 μ

m.

11. The apparatus of claim 1, comprising a diffuse top layer over the LEDs or the dark encapsulation layer or both, resulting in a matte finish or a modified light emission pattern.

12. The apparatus of claim 1, wherein at least one of the LEDs comprises at least two contacts on a same side of the LED.

13. The apparatus of claim 1, wherein at least one of the LEDs comprises a reflector element on a side of the LED.

14. The apparatus of claim 1, comprising an additional layer over the LEDs or the dark encapsulation layer or both, the additional layer comprising one of:

a matte finish for reducing specular reflection;

a plurality of optics layers;

one or more diffractive elements;

liquid crystal elements or polarizing elements or both;

a layer of phosphor or other light converting elements; and

a plurality of light blocking elements.

15. The apparatus of claim 1, comprising a matte finish layer for reducing specular reflection.

16. The apparatus of claim 15, wherein the matte finish layer is roughening on top sides of the LEDs or the dark encapsulation layer or both.

17. The apparatus of claim 15, wherein the matte finish layer is less than 50 μ

m thick.

18. The apparatus of claim 15, wherein the matte finish layer is formed using fumed silica.

19. The apparatus of claim 1, wherein the apparatus has a length or width or both that is less than or equal to 1 mm.

20. A method of producing a panel of light emitting diodes (LEDs), the method comprising:

applying a plurality of electrically conductive bumps to the panel or to at least one of a plurality of LED chips;

joining the panel and the LED chips; and

flooding the panel with dark encapsulation material so that the LED chips are surrounded by the dark encapsulation material.

21. The method of claim 20, comprising coating the panel with white encapsulation material prior to flooding the panel with dark encapsulation material.

22. The method of claim 20, comprising grinding, lapping, sanding, polishing, burnishing, and/or media blasting a surface of the panel, resulting in a matte finish or the LED chips being flush with or above or below the dark encapsulation material by 25 μ

m or less.

23. The method of claim 20, comprising using a material removal process that comprises grinding and/or lapping a plurality of the LED chips, causing a plurality of top surfaces of the LED chips to be substantially coplanar.

24. The method of claim 20, wherein the electrically conductive bumps are solder paste.

25. The method of claim 24, wherein the solder paste is stencil printed on the panel.

26. The method of claim 20, comprising adding a diffuse top layer over the LEDs or the dark encapsulation material or both, resulting in a matte finish or a modified light emission pattern.

27. A light emitting diode (LED) apparatus comprising:

at least one or more light emitting diode (LED), the LED comprising a light emitting surface; and

an encapsulation layer including an inner layer or an outer layer substantially coplanar with the light emitting surface of the LED by at least 25 μ

m or less.

28. The apparatus of claim 27, wherein the one or more LED is on a substrate, and wherein the substrate comprises a top side opposite a bottom side, the bottom side having a plurality of electrical pads.

29. The apparatus of claim 27, wherein the encapsulation layer comprises a dark encapsulation layer.

30. The apparatus of claim 27, comprising an additional layer over the at least one LED or the encapsulation layer or both, the additional layer comprising one of:

a matte finish for reducing specular reflection;

a plurality of optics layers;

one or more diffractive elements;

liquid crystal elements or polarizing elements or both;

a layer of phosphor or other light converting elements; and

a plurality of light blocking elements.

31. The apparatus of claim 27, comprising a plurality of electrically conductive bottom traces disposed over the substrate, wherein the electrically conductive bottom traces cover at least 45% of a bottom area of the substrate.

32. The apparatus of claim 27, comprising a substrate and a plurality of electrically conductive traces disposed over the substrate, wherein at least one LED is electrically connected to at least two of the electrically conductive traces using tin-silver-copper (SAC) solder.

33. The apparatus of claim 32, wherein the electrically conductive traces comprise Ag plated traces.

34. The apparatus of claim 33, wherein the Ag plated traces comprise copper traces with immersion Ag or electrolytic Ag and an optional Ni barrier.

35. An apparatus comprising:

a substrate;

one or more light emitting diodes (LEDs) disposed on the substrate; and

a plurality of electrically conductive traces disposed over the substrate, wherein each LED is electrically connected to at least two of the electrically conductive traces;

wherein each of the one or more LEDs comprises an anode and a cathode on a same side of the LED facing the electrically conductive traces, and wherein the anode is in an anode plane and the cathode is in a cathode plane, and wherein the anode plane and the cathode plane are separated by more than 1 μ

m.

36. The apparatus of claim 35, comprising one or more electrically conductive vias extending from the plurality of electrically conductive traces to one or more bottom conductive traces on a side of the substrate opposite the LEDs, and wherein at least one of the LEDs is bump bonded over one of the electrically conductive vias, and wherein one or more electrically conductive bottom traces cover at least 45% of a bottom area of the substrate.

37. A method for producing a panel of light emitting diodes (LEDs), the method comprising:

applying a plurality of electrically conductive bumps or solder paste to the panel or to at least one LED chip, wherein the electrically conductive bumps comprise tin-silver-copper (SAC) on Ag;

joining the panel and the LED chip; and

flooding the panel with encapsulation material so that the LED chip is surrounded by the encapsulation material.

38. The method of claim 37, wherein Ag is applied to the conductive traces using immersion plating, electroless plating, or electrolytic plating.

39. A method for producing a light emitting diode (LED) apparatus, the method comprising:

applying an encapsulant to or around one or more light emitting diode (LED); and

after application of the encapsulant, planarizing the encapsulant to expose or nearly expose the one or more LED.

40. The method of claim 39, comprising planarizing the encapsulant such that a top surface of the one or more LED is exposed.

41. The method of claim 39, comprising planarizing the encapsulant such that a top surface of the one or more LED is exposed to within 25 μ

m or less.

42. A panel comprising:

a sub-panel layer;

a plurality of RGB component arrays on the sub-panel layer, each RGB component array comprising a plurality of components; and

a layer over the plurality of RGB component arrays;

wherein at least one component comprises;

one or more light emitting diodes (LEDs); and

a dark encapsulation layer surrounding the one or more LEDs.

43. The panel of claim 42, wherein the layer over the plurality of RGB component arrays comprises one of:

a matte finish for reducing specular reflection;

a plurality of optics layers;

one or more diffractive elements;

liquid crystal elements or polarizing elements or both;

a layer of phosphor or other light converting elements; and

a plurality of light blocking elements.