RECEIVER UNIT FOR AN RF TAG

• US 20160300086A1
• Filed: 03/30/2016
• Published: 10/13/2016
• Est. Priority Date: 04/13/2015
• Status: Active Grant

• Current Assignee: EM Microelectronic - Marin SA (The Swatch Group AG)
• Original Assignee: EM Microelectronic - Marin SA (The Swatch Group AG)
• Inventors: LAMOTHE, Christian, COULOT, Thomas, STOJANOVIC, Goran
• Granted Patent: US 9,922,214 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G05F 3/262 using field-effect transistors only
• CPC Class Codes: G06K 19/0715 the arrangement including means to regulate power transfer to the integrated circuit
• CPC Class Codes: G06K 7/10158 methods and means used by the interrogation device for reliably powering the wireless record carriers using an electromagnetic interrogation field

Abstract

The present invention concerns a receiver unit comprising a first and a second input terminal to which are connected an antenna, a communication stage adapted to demodulate and/or modulate an incoming signal in said communication stage and a power stage comprising an AC/DC voltage converter for powering the rest of the circuit.

Claims

1. A receiver unit for an RF tag comprising a first and a second input terminal to which are connected an antenna, a communication stage adapted to demodulate and/or modulate an incoming signal in said communication stage and a power stage comprising a voltage converter for providing the power supply for a unit,

wherein the power stage further includes a regulation circuit adapted to limit the output voltage of the voltage converter, said regulation circuit comprising a regulator circuit adapted to determine a second current value, said second current value being the current value provided in addition to the first current value, the regulator circuit supplying a control signal if said second current value exceeds a predetermined threshold value, the control signal being sent to a limiter circuit arranged to limit the input voltage of the converter circuit.

2. The RF tag receiver unit according to claim 1, wherein the voltage converter is of the alternating/continuous type.

3. The RF tag receiver unit according to claim 2, wherein the voltage converter includes, at input, an earth generator composed of a first and a second N-type MOS transistor connected to each other such that the sources thereof are connected to each other to form the ground of the voltage converter, the drain of the first transistor being connected to the first input terminal and to the gate of the second transistor, whereas the drain of the second transistor is connected to the second input terminal and to the gate of the first transistor, the voltage converter further comprising a plurality of identical structures forming a voltage modifier part, and wherein said converter output includes two N-type MOS transistors wherein the sources of the transistors are connected to each other to form the output line, the drain of one of the transistors being connected to the last structure of the voltage modifier part extending from the first terminal, the drain of the other transistor being connected to the last structure of the voltage modifier part extending from the second terminal, the gate of each transistor being connected to its source.

4. The RF tag receiver unit according to claim 3, wherein the voltage modifier part is arranged so that, from each of the first and second input terminals there extends a series of identical structures connected to each other, the first structure of each series being connected to one of the first and second input terminals and to the following structure, the connection point between two structures being connected to one of the first or second input terminals so that each structure is connected to the first terminal and to the second terminal.

5. The receiver unit according to claim 1, wherein the limiter circuit includes at least one transistor connected via the drain thereof to the first input terminal and via the source thereof to the second input terminal, the control signal being sent to the gate thereof in order to make said at least one transistor more or less conductive.

6. The receiver unit according to claim 5, wherein the limiter circuit includes a plurality of transistors mounted in parallel.

7. The receiver unit according to claim 1, wherein the regulation unit further includes a bandgap voltage generator for supplying the reference voltage and the polarization currents to the shunt voltage regulator.

8. The receiver unit according to claim 1, wherein the communication stage is adapted to provide a signal representative of a communication action which is directly connected to the limiter circuit to prevent regulation during such a communication action.

9. A RF tag comprising a control unit including a calculation unit and a memory for performing at least one function, and at least one receiver unit arranged to receive or send a signal and to supply power to said control unit, wherein said receiver unit is a receiver unit according to claim 1.

10. The RF tag according to claim 9, wherein the receiver unit is arranged to operate according to a first protocol using a first frequency.

11. The RF tag according to claim 10, wherein the first protocol is a long distance protocol.

12. The RF tag according to claim 9, wherein the tag further includes a second receiver unit arranged to operate according to a second protocol using a second frequency, said second receiver unit being arranged to supply a current for a unit, said control unit receiving a current whose value is the sum of the currents from the first receiver unit and from the second receiver unit.

13. The RF tag according to claim 10, wherein the tag further includes a second receiver unit arranged to operate according to a second protocol using a second frequency, said second receiver unit being arranged to supply a current for a unit, said control unit receiving a current whose value is the sum of the currents from the first receiver unit and from the second receiver unit.

14. The RF tag according to claim 11, wherein the tag further includes a second receiver unit arranged to operate according to a second protocol using a second frequency, said second receiver unit being arranged to supply a current for a unit, said control unit receiving a current whose value is the sum of the currents from the first receiver unit and from the second receiver unit.

15. The RF tag according to claim 12, wherein the first receiver unit further includes a current mirror circuit used to supply a signal representative of a current which is the image of the sum of the first and second receiver unit currents, the second receiver unit further comprising a current mirror circuit used to supply a signal representative of a current which is the image of the current supplied by the second receiver unit and wherein the first receiver unit further includes a subtractor circuit for subtracting the current being the image of the sum of the first and second receiver unit currents from the current being the image of the current supplied by the second receiver unit and for supplying, to the limiter circuit, a signal representative only of the current from the first receiver unit.

16. The RF tag according to claim 13, wherein the first receiver unit further includes a current mirror circuit used to supply a signal representative of a current which is the image of the sum of the first and second receiver unit currents, the second receiver unit further comprising a current mirror circuit used to supply a signal representative of a current which is the image of the current supplied by the second receiver unit and wherein the first receiver unit further includes a subtractor circuit for subtracting the current being the image of the sum of the first and second receiver unit currents from the current being the image of the current supplied by the second receiver unit and for supplying, to the limiter circuit, a signal representative only of the current from the first receiver unit.

17. The RF tag according to claim 14, wherein the first receiver unit further includes a current mirror circuit used to supply a signal representative of a current which is the image of the sum of the first and second receiver unit currents, the second receiver unit further comprising a current mirror circuit used to supply a signal representative of a current which is the image of the current supplied by the second receiver unit and wherein the first receiver unit further includes a subtractor circuit for subtracting the current being the image of the sum of the first and second receiver unit currents from the current being the image of the current supplied by the second receiver unit and for supplying, to the limiter circuit, a signal representative only of the current from the first receiver unit.