SCALABLE AND AREA OPTIMIZED METHOD TO IMPLEMENT COMMAND QUEUES IN SRIOV BASED NVM DEVICES

• US 20160306549A1
• Filed: 01/04/2016
• Published: 10/20/2016
• Est. Priority Date: 04/16/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: NADAKUDITI, SRINIVASA RAJU, SAMPATH, MADHUSUDAN, KUNNUMPURATHU SIVAN, SARATH KUMAR
• Granted Patent: US 9,990,139 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 13/00 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units interface circuits for specific input/output devices G06F3/00 ; multiprogram control therefor G06F9/46; multiprocessor systems G06F15/16
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 2009/45579 I/O management, e.g. providing access to device drivers or storage
• CPC Class Codes: G06F 2009/45583 Memory management, e.g. access or allocation
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 9/44 Arrangements for executing specific programs
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects
• CPC Class Codes: H04L 41/0654 using network fault recovery ring fault isolation or reconfiguration in loop networks without recovery actions by a network management system H04L12/437
• CPC Class Codes: H04L 41/0681 Configuration of triggering conditions
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Provided are method for dynamically allocating resources to command queues and response queues by a non-volatile memory (NVM) controller. The method includes creating command queues and response queues for at least one operating system among a plurality of operating systems running on a host system and mapping the created command queues and response queues to a plurality of internal shared queue registers. The plurality of operating systems running on the host system communicate with at least one NVM controller independently.

Claims

1. A method for dynamically allocating resources to command queues and response queues by a non-volatile memory (NVM) controller, the method comprising:

creating command queues and response queues for at least one operating system among a plurality of operating systems running on a host system; and

mapping the created command queues and response queues to a plurality of internal shared queue registers,

wherein the plurality of operating systems running on the host system communicate with at least one NVM controller independently.

2. The method of claim 1, wherein the command queues and response queues are created using inputs from one of:

at least one physical function (PF) and at least one virtual function (VF).

3. The method of claim 2, wherein the functions support a Single Root I/O Virtualization (SRIOV) specification.

4. The method of claim 1, wherein the command queues and response queues created by the NVM controller is based on a number of queues supported by the shared plurality of internal queue registers, wherein the number of queues supported by the plurality of internal shared queue registers is based on a number of queues supported by a NVM device.

5. The method of claim 4, wherein the NVM controller is located within the NVM device.

6. The method of claim 1, wherein each operating system is managed by a different virtual machine running on the host system.

7. An apparatus for dynamically allocating resources to command queues and response queues, the apparatus comprising:

a non-volatile memory (NVM) controller configured to create the command queues and response queues for at least one operating system among a plurality of operating systems running on a host system, and map the created command queues and response queues to a plurality of internal shared queue registers,

wherein the plurality of operating systems running on the host system communicate with at least one NVM controller independently.

8. The NVM controller of claim 7, wherein the command queues and response queues are created using inputs from one of:

at least one physical function (PF) and at least one virtual function (VF).

9. The NVM controller of claim 8, wherein the functions support a Single Root I/O Virtualization (SRIOV) specification.

10. The NVM controller of claim 7, wherein the command queues and response queues created by the NVM controller is based on a number of queues supported by the shared plurality of internal queue registers,

wherein the number of queues supported by the plurality of internal shared queue registers is based on a number of queues supported by an NVM device.

11. The NVM controller of claim 10, wherein the NVM controller is located within the NVM device.

12. The NVM controller of claim 7, wherein each operating system is managed by a different virtual machine running on the host system.

13. A system configured to manage a plurality of virtual machines, the system comprising:

a host computer comprising a host operating system, and a hypervisor configured to manage a first virtual machine comprising a first guest operating system and a first virtual function driver and a second virtual machine comprising a second guest operating system and a second virtual function driver;

a non-volatile memory (NVM),

wherein the NVM comprises a controller configured to create queues in a register of the NVM, and map the first virtual function driver and the second virtual function driver to the same queues stored in the register.

14. The system of claim 13, wherein the NVM is configured to support a Single Root I/O Virtualization (SRIOV) specification.

15. The system of claim 13, the queues comprise at least one command queue configured to store a command to be executed by one of the guest operating systems and a response queue configured to store a result of executing the command.

16. The system of claim 13, wherein the queues are created using an input from a virtual function of one of the virtual function drivers that is compatible with a Single Root I/O Virtualization (SRIOV) specification.

17. The system of claim 16, wherein one of the virtual function drivers uses descriptors to communicate with the virtual function to inform the virtual function where to copy data to and from a host memory of the host computer.

18. The system of claim 13, wherein the queues are created using an input from a physical function of a physical function driver of the host computer that is compatible with a Single Root I/O Virtualization (SRIOV) specification

19. The system of claim 13, wherein the queues are based on a number of queues supported by the register, wherein the number of queues supported by the register is based on a number of registers supported by the NVM.

20. The system of claim 13, further comprising a PCIe root complex configured to interface with the hypervisor and the NVM.