REFERENCE VOLTAGE GENERATION CIRCUIT, REGULATOR, AND SEMICONDUCTOR DEVICE

• US 20160320783A1
• Filed: 04/26/2016
• Published: 11/03/2016
• Est. Priority Date: 05/01/2015
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: YOSHII, Yusuke, INOUE, Yuki
• Granted Patent: US 9,886,047 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: G05F 3/30 Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities G05F3/26 takes precedence
• CPC Class Codes: H03F 2203/45522 the FBC comprising one or more potentiometers
• CPC Class Codes: H03F 2203/45534 the FBC comprising multiple switches and being coupled between the LC and the IC
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03K 5/24 the characteristic being amplitude

Abstract

As one example of the invention disclosed herein, a reference voltage generation circuit has: a first reference voltage source generating a first reference voltage; a second reference voltage source generating a second reference voltage having a temperature response different from that of the first reference voltage; a first comparator comparing the first and second reference voltages to generate a first comparison signal; and a selector selectively outputting one of the first and second reference voltages as a reference voltage according to the first comparison signal.

Claims

1. A reference voltage generation circuit, comprising:

a first reference voltage source that generates a first reference voltage;

a second reference voltage source that generates a second reference voltage, the second reference voltage having a temperature response different from a temperature response of the first reference voltage;

a first comparator that compares the first and second reference voltages with each other to generate a first comparison signal; and

a selector that selectively outputs one of the first and second reference voltages as a reference voltage according to the first comparison signal.

2. The reference voltage generation circuit of claim 1, further comprising:

a third reference voltage source that generates a third reference voltage, the third reference voltage having a temperature response different from either of the temperature responses of the first and second reference voltages;

a second comparator that compares the second and third reference voltages with each other to generate a second comparison signal; and

a logic operator that generates a switching signal from the first and second comparison signals,

wherein the selector selects one of the first, second, and third reference voltages as the reference voltage according to the switching signal.

3. The reference voltage generation circuit of claim 2,

wherein the first reference voltage has a local maximum at about −

20°

C., the second reference voltage has a local maximum at about +40°

C., and the third reference voltage has a local maximum at about +100°

C.

4. The reference voltage generation circuit of claim 1,

wherein the first, second, and third voltage sources are each a bandgap reference voltage source.

5. The reference voltage generation circuit of claim 4,

wherein the first, second, and third voltage sources each include:

an amplifier;

a first resistor connected between an output terminal of the amplifier and a first input terminal of the amplifier;

a second resistor connected between the output terminal of the amplifier and a second input terminal of the amplifier;

a third resistor connected between the second input terminal of the amplifier and a ground terminal;

a first diode connected between the first input terminal of the amplifier and the ground terminal; and

a plurality of second diodes connected in parallel with each other between the second input terminal of the amplifier and the ground terminal.

6. The reference voltage generation circuit of claim 5,

wherein a resistance ratio of a resistance value of the second resistor to a resistance value of the third resistor differs among the first, second, and third voltage sources.

25. A semiconductor device, comprising the reference voltage generation circuit of claim 1.

26. The semiconductor device of claim 25, further comprising:

a pre-regulator that generates a first internal supply voltage and a second internal supply voltage from an input voltage; and

a regulator that generates a constant voltage from the first internal supply voltage,

wherein

the reference voltage generation circuit generates the reference voltage by being supplied with the second internal supply voltage from the pre-regulator, and

the regulator performs output feedback control so as to keep equal the constant voltage or a feedback voltage commensurate therewith and the reference voltage.

29. The semiconductor device of claim 26, further comprising:

a buffer that receives the constant voltage to output a buffer voltage.

30. The semiconductor device of claim 26,

wherein at least one of the first internal supply voltage, the constant voltage, and the buffer voltage is output externally.

31. The semiconductor device of claim 26, further comprising:

a non-volatile memory that non-volatilely stores a trimming signal.

7. A reference voltage generation circuit, comprising:

an amplifier;

a first resistor connected between an output terminal of the amplifier and a first input terminal of the amplifier;

a second resistor connected between the output terminal of the amplifier and a second input terminal of the amplifier;

a third resistor connected between the second input terminal of the amplifier and a ground terminal;

a first diode connected between the first input terminal of the amplifier and the ground terminal; and

a plurality of second diodes connected in parallel with each other between the second input terminal of the amplifier and the ground terminal,

wherein one of the first and second resistors includes;

a first resistor portion;

a second resistor portion having a temperature response different from a temperature response of the first resistor portion, and

a first trimming portion that adjusts resistance values of the first and second resistor portions while keeping a composite resistance value thereof constant.

8. The reference voltage generation circuit of claim 7, wherein

the second resistor portion includes:

a first resistor element having a first resistance value; and

a second resistor element having a second resistance value different from the first resistance value,

the first resistor portion includes;

a third resistor element having the first resistance value; and

a fourth resistor element having the second resistance value,

the first trimming portion includes;

a first transistor connected in parallel with the first resistor element;

a second transistor connected in parallel with the second resistor element;

a third transistor connected in parallel with the third resistor element; and

a fourth transistor connected in parallel with the fourth resistor element,

when the first and fourth transistors are ON, the second and third transistors are OFF, and

when the first and fourth transistors are OFF, the second and third transistors are ON.

9. The reference voltage generation circuit of claim 8,

wherein the first resistor portion further includes a fifth resistor element having a third resistance value.

10. The reference voltage generation circuit of claim 7, wherein

another of the first and second resistors includes:

a third resistor element and a fourth resistor element each having a temperature response identical with the temperature response of the first resistor element; and

a second trimming portion that adjusts resistance values of the third and fourth resistor portions while keeping a composite resistance value thereof constant.

11. The reference voltage generation circuit of claim 10, wherein

the third resistor portion includes:

a sixth resistor element having the first resistance value; and

a seventh resistor element having the second resistance value,

the fourth resistor portion includes;

an eighth resistor element having the first resistance value; and

a ninth resistor element having the second resistance value,

the second trimming portion includes;

a fifth transistor connected in parallel with the sixth resistor element;

a sixth transistor connected in parallel with the seventh resistor element;

a seventh transistor connected in parallel with the eighth resistor element; and

an eighth transistor connected in parallel with the ninth resistor element,

when the fifth and eighth transistors are ON, the sixth and seventh transistors are OFF, and

when the fifth and eighth transistors are OFF, the sixth and seventh transistors are ON.

12. The reference voltage generation circuit of claim 11,

wherein the third resistor portion further includes a tenth resistor element having the third resistance value.

13. A reference voltage generation circuit, comprising:

an amplifier;

a first resistor connected between an output terminal of the amplifier and a first input terminal of the amplifier;

a second resistor connected between the output terminal of the amplifier and a second input terminal of the amplifier;

a third resistor connected between the second input terminal of the amplifier and a ground terminal;

a first diode connected between the first input terminal of the amplifier and the ground terminal; and

a plurality of second diodes connected in parallel with each other between the second input terminal of the amplifier and the ground terminal,

wherein one of the first and second resistors is composed of a combination of a polyresistor portion and a diffusion resistor portion.

14. The reference voltage generation circuit of claim 13,

wherein the first and second resistors are designed to have an equal resistance value.

15. The reference voltage generation circuit of claim 13,

wherein a resistance value of the diffusion resistor portion has a local minimum with respect to variation in temperature.

16. The reference voltage generation circuit of claim 13,

wherein the diffusion resistor portion includes:

a pair of first low-concentration n-type diffusion regions formed in a p-type semiconductor substrate;

a pair of high-concentration n-type diffusion regions formed in the pair of first low-concentration n-type diffusion regions respectively;

a second low-concentration n-type diffusion region formed in the semiconductor substrate between the pair of first low-concentration n-type diffusion regions; and

a pair of electrodes formed in the high-concentration n-type diffusion regions respectively.

17. The reference voltage generation circuit of claim 16,

wherein a dopant concentration in the second low-concentration n-type diffusion region is adjusted such that a resistance value of the diffusion resistor portion has a local minimum with respect to variation in temperature.

18. The reference voltage generation circuit of claim 13,

wherein the diffusion resistor portion is formed by exploiting a floating-gate cell transistor included in a non-volatile memory.

19. A regulator, comprising:

an amplifier that outputs an amplified voltage so as to keep a feedback voltage and a reference voltage equal;

a resistor ladder that generates the feedback voltage by dividing the amplified voltage;

a first switch array that selects one of endmost and middle nodes of a first resistor array included in the resistor ladder to connect the selected node to an output terminal of a constant voltage;

a second switch array connected in parallel with a second resistor array included in the resistor ladder; and

a decoder that controls the first and second switch arrays according to a trimming signal.

20. The regulator of claim 19,

wherein a plurality of first resistors constituting the first resistor array all have an equal resistance value.

21. The regulator of claim 19,

wherein a plurality of second resistors constituting the second resistor array have mutually different resistance values.

22. The regulator of claim 19,

wherein a plurality of second resistors constituting the second resistor array each have a resistance value higher than a resistance value of any of a plurality of first resistors constituting the first resistor array.

23. The regulator of claim 22, wherein

the plurality of first resistors each have a reference voltage of less than 5 kΩ

, and

the plurality of second resistors each have a reference voltage of less than 5 kΩ

.

24. The regulator of claim 19, wherein

the resistor ladder includes, in addition to the first and second resistor arrays connected between an output terminal of the amplifier and an output terminal of the feedback voltage,

a third resistor connected between the output terminal of the amplifier and the output terminal of the feedback voltage;

and

a fourth resistor connected between the output terminal of the feedback voltage and a ground terminal.

27. A semiconductor device, comprising the regulator of claim 19.

28. A semiconductor device of claim 27, further comprising:

a pre-regulator that generates a first internal supply voltage and a second internal supply voltage from an input voltage; and

a reference voltage generation circuit that generates the reference voltage by being supplied with the second internal supply voltage from the pre-regulator,

wherein the regulator generates the constant voltage from the first internal supply voltage so as to keep the feedback voltage and the reference voltage equal.