PIXEL UNIT, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, DISPLAY PANEL AND DISPLAY DEVICE
First Claim
1. A pixel unit, comprising a display region and a thin film transistor (TFT) component region, wherein in the TFT component region, a base, a gate line, a gate insulating layer, an active layer, a data line, a source electrode, a drain electrode, and a pixel electrode lapped onto the drain electrode are provided sequentially from the bottom up, whereinat least two step portions adjacent to each other in an upward direction are provided at at least one of a first side of the drain electrode close to the display region and a second side of the drain electrode away from the display region, and the pixel electrode is lapped onto the drain electrode gently.
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Accused Products
Abstract
Disclosed are a pixel unit, an array substrate and a manufacturing method therefor, a display panel and a display device. At least two step portions adjacent to each other in an upward direction are provided at at least one of a first side of a drain electrode close to a display region and a second side of the drain electrode away from the display region, such that a pixel electrode is lapped onto the drain electrode gently.
4 Citations
16 Claims
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1. A pixel unit, comprising a display region and a thin film transistor (TFT) component region, wherein in the TFT component region, a base, a gate line, a gate insulating layer, an active layer, a data line, a source electrode, a drain electrode, and a pixel electrode lapped onto the drain electrode are provided sequentially from the bottom up, wherein
at least two step portions adjacent to each other in an upward direction are provided at at least one of a first side of the drain electrode close to the display region and a second side of the drain electrode away from the display region, and the pixel electrode is lapped onto the drain electrode gently.
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11. An array substrate comprising a pixel unit, wherein the pixel unit comprises a display region and a thin film transistor (TFT) component region, in the TFT component region, a base, a gate line, a gate insulating layer, an active layer, a data line, a source electrode, a drain electrode, and a pixel electrode lapped onto the drain electrode are provided sequentially from the bottom up, wherein
at least two step portions adjacent to each other in an upward direction are provided at at least one of a first side of the drain electrode close to the display region and a second side of the drain electrode away from the display region, and the pixel electrode is lapped onto the drain electrode gently.
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16. A manufacturing method of an array substrate, wherein the array substrate comprises a plurality of pixel units, each of the plurality of pixel units comprises a display region and a thin film transistor (TFT) component region, and wherein the manufacturing method comprises:
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providing a base, forming a patterned gate line on the base, forming a gate insulating layer on the gate line, and forming an active layer and a data line on the gate insulating layer; forming a patterned source electrode and a patterned drain electrode on the active layer; forming at least two step portions adjacent to each other in an upward direction at at least one of a first side of the drain electrode close to the display region and a second side of the drain electrode away from the display region by means of a partially transparent mask plate; and lapping a pixel electrode onto the drain electrode having the step portions gently.
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Specification