Method for Realizing Heterogeneous III-V Silicon Photonic Integrated Circuits

• US 20160327759A1
• Filed: 05/06/2016
• Published: 11/10/2016
• Est. Priority Date: 05/07/2015
• Status: Active Grant

• Current Assignee: IMEC International, Universiteit Gent Vzw
• Original Assignee: IMEC International, Universiteit Gent Vzw
• Inventors: Keyvaninia, Shahram, Van Thourhout, Dries, Roelkens, Gunther
• Granted Patent: US 9,772,447 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02B 2006/12061 Silicon
• CPC Class Codes: G02B 2006/12078 Gallium arsenide or alloys (GaAs, GaAlAs, GaAsP, GaInAs)
• CPC Class Codes: G02B 2006/12107 Grating
• CPC Class Codes: G02B 2006/12121 Laser
• CPC Class Codes: G02B 2006/12123 Diode
• CPC Class Codes: G02B 2006/12142 Modulator
• CPC Class Codes: G02B 6/12 of the integrated circuit kind electric integrated circuits H01L27/00
• CPC Class Codes: G02B 6/12002 Three-dimensional structures
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/1228 Tapered waveguides, e.g. integrated spot-size transformers for coupling with fibres G02B6/305
• CPC Class Codes: G02B 6/14 Mode converters
• CPC Class Codes: G02B 6/34 utilising prism or grating G02B6/293 takes precedence
• CPC Class Codes: G02F 1/01708 in an optical wavequide structure
• CPC Class Codes: H01L 31/1035 the devices comprising active layers formed only by AIIIBV compounds
• CPC Class Codes: H01S 5/0215 Bonding to the substrate
• CPC Class Codes: H01S 5/0218 Substrates comprising semiconducting materials from other groups of the Periodic Table than the materials of the active layer

Abstract

A method of producing a heterogeneous photonic integrated circuit includes integrating at least one III-V hybrid device on a source substrate having at least a top silicon layer, and transferring by transfer-printing or by flip-chip bonding the III-V hybrid device and at least part of the top silicon layer of the source substrate to a semiconductor-on-insulator or dielectric-on-insulator host substrate.

Claims

1. A method of producing a photonic integrated circuit, the method comprising:

integrating at least one III-V hybrid device on a source substrate having at least a top silicon waveguide layer; and

transferring, by transfer-printing or by flip-chip bonding, the III-V hybrid device and at least part of the top silicon waveguide layer of the source substrate to a semiconductor-on-insulator host substrate.

2. The method of claim 1, further comprising providing one or more of at least one taper or at least one grating in the top silicon waveguide layer positioned for, in operation, coupling radiation from or to the III-V hybrid device, and wherein transferring at least part of the top silicon waveguide layer comprises transferring the one or more of the at least one taper or the at least one grating.

3. The method of claim 1, wherein integrating at least one III-V hybrid device comprises transferring III-V materials to the source substrate, and performing additional processing for forming the hybrid device on the source substrate.

4. The method of claim 3, wherein transferring III-V materials to the source substrate includes any of multi-wafer bonding or multi-die bonding, adhesive bonding, molecular bonding, flip chip bonding, or transfer printing.

5. The method of claim 2, wherein the top silicon waveguide layer of the source substrate includes an adiabatic taper, and the III-V hybrid device comprises a waveguide including a passive taper or an active taper.

6. The method of claim 1, wherein the host substrate comprises a host waveguide, and wherein:

the photonic integrated circuit comprises a polymer waveguide configured to couple radiation between the transferred silicon waveguide layer and the host waveguide, or

the photonic integrated circuit comprises a spot converter configured to couple radiation between the transferred silicon waveguide layer and the host waveguide, or

the host substrate and the transferred silicon waveguide layer each comprise diffractive elements aligned to each other and configured perform diffractive assisted coupling.

7. The method of claim 1, further comprising obtaining the host substrate, the obtained host substrate being a semiconductor-on-insulator substrate, or a dielectric-on-insulator substrate comprising a waveguide top layer exhibiting a substantial mismatch in effective index with the III-V waveguide mode, thereby allowing the use of standard substrates.

8. The method of claim 1, further comprising obtaining the host substrate, the obtained host substrate being a dielectric-on-insulator substrate comprising a silicon nitride top layer.

9. The method of claim 1, wherein integrating a III-V hybrid device comprises integrating any of a laser, amplifier, a modulator, or a detector.

10. A photonic integrated circuit comprising a host substrate being a semiconductor-on-insulator or dielectric-on-insulator host substrate;

and

a III-V hybrid device and silicon layer, the III-V hybrid device being integrated with the silicon layer, and the III-V hybrid device and silicon layer having been transfer-printed or flip-chip bonded on the host substrate together.

11. The photonic integrated circuit of claim 10, wherein the silicon layer has been transfer printed, and wherein the silicon layer is positioned between the host substrate and the III-V hybrid device.

12. The photonic integrated circuit of claim 10, wherein the silicon layer comprises one or more of at least one taper or at least one grating positioned to, in operation, couple radiation from or to the III-V hybrid device.

13. The photonic integrated circuit of claim 10, wherein the silicon layer comprises an adiabatic taper, and the III-V material forms a waveguide comprising a passive taper or an active taper.

14. The photonic integrated circuit of claim 10, wherein the host substrate comprises a host waveguide, and wherein:

the photonic integrated circuit comprises a polymer waveguide configured to couple radiation between the transferred silicon layer and the host waveguide;

or

the photonic integrated circuit comprises a spot converter configured to couple radiation between the transferred silicon layer and the host waveguide;

or

the host substrate and the transferred silicon layer each comprise gratings aligned to each other and configured to perform grating assisted coupling.

15. The photonic integrated circuit of claim 10, wherein the host substrate comprises a host waveguide being a dielectric-on-insulator wafer comprising a silicon nitride top layer.