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ARCHITECTURE AND IMPLEMENTATION OF CORTICAL SYSTEM, AND FABRICATING AN ARCHITECTURE USING 3D WAFER SCALE INTEGRATION

  • US 20160334991A1
  • Filed: 05/15/2015
  • Published: 11/17/2016
  • Est. Priority Date: 05/15/2015
  • Status: Active Grant
First Claim
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1. A processor-memory system comprising:

  • a memory area;

    a multitude of specialized processors embedded in the memory area, each of the specialized processors being configured for performing a specified set of operations using an associated memory domain in the memory area;

    a management processor to control operations of an associated set of the specialized processors.

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