GOA CIRCUIT BASED ON OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR

• US 20160351152A1
• Filed: 06/23/2015
• Published: 12/01/2016
• Est. Priority Date: 06/01/2015
• Status: Active Grant

• Current Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Original Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Inventors: Dai, Chao
• Granted Patent: US 9,858,880 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G09G 2320/0214 with crosstalk due to leakage current of pixel switch in active matrix panels
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

The present invention provides a GOA circuit based on oxide semiconductor thin film transistor, which cannot only prevent the electrical leakage to raise the reliability of the GOA circuit but also avoid the generation of the crossfire current in the non-function period by shorting the gate and the source of the fortieth thin film transistor (T40) in the first pull-down module (400) for avoiding the influence of the constant high voltage level (DCH) to the pull-down holding of the first node by electrically coupling both the gate and the drain of the seventy-fifth thin film transistor (T75) in the pull-down holding module (600) to the first node (Q(N)), and clearing the interference of the residual charge to the GOA circuit by providing the reset module (700) to reset the first node (Q(N)) before generating the each frame to guarantee the normal output of the GOA circuit and the normal display of the image.

Claims

1. A GOA circuit based on oxide semiconductor thin film transistor, comprising a plurality of GOA unit circuits which are cascade connected, and the GOA unit circuit of every stage comprises a pull-up controlling module, a pull-up module, a transmission module, a first pull-down module, a bootstrap capacitor module and a pull-down holding module;

N is set to be a positive integer and except the GOA unit circuit of the first stage, in the GOA unit circuit of the Nth stage;

the pull-up controlling module comprises an eleventh thin film transistor, and a gate of the eleventh thin film transistor receives a stage transfer signal of the GOA unit circuit of the former N−

1th stage, and a source is electrically coupled to a constant high voltage level, and a drain is electrically coupled to a first node;

the pull-up module comprises;

a twenty-first thin film transistor, and a gate of the twenty-first thin film transistor is electrically coupled to the first node, and a source is electrically coupled to an mth set of clock signal corresponding to the GOA unit circuit of the Nth stage, and a drain outputs a scan driving signal;

the transmission module comprises;

a twenty-second thin film transistor, and a gate of the twenty-second thin film transistor is electrically coupled to the first node, and a source is electrically coupled to the mth set of clock signal corresponding to the GOA unit circuit of the Nth stage, and a drain outputs a stage transfer signal;

the first pull-down module comprises a fortieth thin film transistor and a forty-first thin film transistor;

both a gate and a source of the fortieth thin film transistor are electrically coupled to the first node, and a drain is electrically coupled to a drain of the forty-first thin film transistor;

a gate of the forty-first thin film transistor is inputted with an m+2th set of clock signal corresponding to the GOA unit circuit of the after next N+2th stage, and a source is inputted with the scan driving signal;

the bootstrap capacitor module comprises a capacitor, and one end of the capacitor is electrically coupled to the first node, and the other end is electrically coupled to the scan drive signal;

the pull-down holding module comprises;

a dual inverter composed by a plurality of thin film transistor, a forty-second thin film transistor, a thirty-second thin film transistor, a seventy-fifth thin film transistor and a seventy-sixth thin film transistor;

an input end of the dual inverter is electrically coupled to the first node, and an output end is electrically coupled to a second node;

a gate of the forty-second thin film transistor is electrically coupled to the second node, and a drain is electrically coupled to the first node, and a source is electrically coupled to a third node;

a gate of the thirty-second thin film transistor is electrically coupled to the second node, and a drain is electrically coupled to the scan driving signal, and a source is electrically coupled to a first constant negative voltage level;

both a gate and a drain of the seventy-fifth thin film transistor are electrically coupled to the first node, and a source is electrically coupled to the third node;

a gate of the seventy-sixth thin film transistor is electrically coupled to the second node, and a drain is electrically coupled to the third node, and a source is electrically coupled to a second constant negative voltage level;

the second constant negative voltage level is lower than the first constant negative voltage level;

all the thin film transistors are oxide semiconductor thin film transistors.

2. The GOA circuit based on oxide semiconductor thin film transistor according to claim 1, further comprising a reset module, employed to reset the first node before generating the each frame.

3. The GOA circuit based on oxide semiconductor thin film transistor according to claim 2, wherein the reset module comprises a ninth thin film transistor, and a gate of the ninth thin film transistor receives a scan activation signal, and a drain is electrically coupled to the first node, and a source is electrically coupled to the first constant negative voltage level.

4. The GOA circuit based on oxide semiconductor thin film transistor according to claim 2, wherein the reset module comprises a ninth thin film transistor, and a gate of the ninth thin film transistor receives a scan activation signal, and a drain is electrically coupled to the first node, and a source is electrically coupled to the mth set of clock signal corresponding to the GOA unit circuit of the Nth stage.

5. The GOA circuit based on oxide semiconductor thin film transistor according to claim 2, wherein the reset module comprises a ninth thin film transistor, and a gate of the ninth thin film transistor receives a reset signal, and a drain is electrically coupled to the first node, and a source is electrically coupled to the mth set of clock signal corresponding to the GOA unit circuit of the Nth stage;

the reset signal is generated before the scan activation signal.

6. The GOA circuit based on oxide semiconductor thin film transistor according to claim 3, wherein the clock signal is set to comprises M sets, and M is an integer multiple of 4, and as N>

M, the reset module is set in the GOA unit circuit of the Nth stage.

7. The GOA circuit based on oxide semiconductor thin film transistor according to claim 4, wherein the clock signal is set to comprises M sets, and M is an integer multiple of 4, and as N>

M, the reset module is set in the GOA unit circuit of the Nth stage.

8. The GOA circuit based on oxide semiconductor thin film transistor according to claim 5, wherein the reset module is provided in the GOA unit circuit of every stage.

9. The GOA circuit based on oxide semiconductor thin film transistor according to claim 6, wherein the clock signal totally comprises four sets:

a first set of clock signal, a second set of clock signal, a third set of clock signal and a fourth set of clock signal;

as the mth set of clock signal is the third set of clock signal, an m+2th set of clock signal is the first set of clock signal, and as the mth set of clock signal is the fourth set of clock signal, the m+2th set of clock signal is the second set of clock signal;

waveform duty ratio of the four sets of clock signals is 25/75;

the reset module is provided in the GOA unit circuits from the fifth stage to the last stage.

10. The GOA circuit based on oxide semiconductor thin film transistor according to claim 7, wherein the clock signal totally comprises four sets:

a first set of clock signal, a second set of clock signal, a third set of clock signal and a fourth set of clock signal;

as the mth set of clock signal is the third set of clock signal, an m+2th set of clock signal is the first set of clock signal, and as the mth set of clock signal is the fourth set of clock signal, the m+2th set of clock signal is the second set of clock signal;

waveform duty ratio of the four sets of clock signals is 25/75;

the reset module is provided in the GOA unit circuits from the fifth stage to the last stage.

11. The GOA circuit based on oxide semiconductor thin film transistor according to claim 1, wherein the dual inverter comprises:

a fifty-first thin film transistor, and both a gate and a source of the fifty-first thin film transistor are electrically coupled to the constant high voltage level, and a drain is electrically coupled to a fourth node;

a fifty-second thin film transistor, and a gate of the fifty-second thin film transistor is electrically coupled to the first node, and a drain is electrically coupled to the fourth node, and a source is electrically coupled to the first constant negative voltage level;

a fifty-third thin film transistor, and a gate of the fifty-third thin film transistor is electrically coupled to the fourth node, and a source is electrically coupled to the constant high voltage level, and a drain is electrically coupled to the second node;

a fifty-fourth thin film transistor, and a gate of the fifty-fourth thin film transistor is electrically coupled to the first node, and a drain is electrically coupled to the second node, and a source is electrically coupled to a fifth node;

a seventy-third thin film transistor, and a gate of the seventy-third thin film transistor is electrically coupled to the fourth node, and a source is electrically coupled to the constant high voltage level, and a drain is electrically coupled to the fifth node;

a seventy-fourth thin film transistor, and a gate of the seventy-fourth thin film transistor is electrically coupled to the first node, and a source is electrically coupled to the second constant negative voltage level, and a drain is electrically coupled to the fifth node;

wherein the fifty-first thin film transistor, the fifty-second thin film transistor, the fifty-third thin film transistor and the fifty-fourth thin film transistor construct a main inverter, and the seventy-third thin film transistor and the seventy-fourth thin film transistor construct an auxiliary inverter.

12. The GOA circuit based on oxide semiconductor thin film transistor according to claim 1, wherein in the GOA unit circuit of the first stage, the gate of the eleventh thin film transistor receives a scan activation signal.

13. A GOA circuit based on oxide semiconductor thin film transistor, comprising a plurality of GOA unit circuits which are cascade connected, and the GOA unit circuit of every stage comprises a pull-up controlling module, a pull-up module, a transmission module, a first pull-down module, a bootstrap capacitor module and a pull-down holding module;

N is set to be a positive integer and except the GOA unit circuit of the first stage, in the GOA unit circuit of the Nth stage;

the pull-up controlling module comprises an eleventh thin film transistor, and a gate of the eleventh thin film transistor receives a stage transfer signal of the GOA unit circuit of the former N−

1th stage, and a source is electrically coupled to a constant high voltage level, and a drain is electrically coupled to a first node;

the pull-up module comprises;

a twenty-first thin film transistor, and a gate of the twenty-first thin film transistor is electrically coupled to the first node, and a source is electrically coupled to an mth set of clock signal corresponding to the GOA unit circuit of the Nth stage, and a drain outputs a scan driving signal;

the transmission module comprises;

a twenty-second thin film transistor, and a gate of the twenty-second thin film transistor is electrically coupled to the first node, and a source is electrically coupled to the mth set of clock signal corresponding to the GOA unit circuit of the Nth stage, and a drain outputs a stage transfer signal;

the first pull-down module comprises a fortieth thin film transistor and a forty-first thin film transistor;

both a gate and a source of the fortieth thin film transistor are electrically coupled to the first node, and a drain is electrically coupled to a drain of the forty-first thin film transistor;

a gate of the forty-first thin film transistor is inputted with an m+2th set of clock signal corresponding to the GOA unit circuit of the after next N+2th stage, and a source is inputted with the scan driving signal;

the bootstrap capacitor module comprises a capacitor, and one end of the capacitor is electrically coupled to the first node, and the other end is electrically coupled to the scan drive signal;

the pull-down holding module comprises;

a dual inverter composed by a plurality of thin film transistor, a forty-second thin film transistor, a thirty-second thin film transistor, a seventy-fifth thin film transistor and a seventy-sixth thin film transistor;

an input end of the dual inverter is electrically coupled to the first node, and an output end is electrically coupled to a second node;

a gate of the forty-second thin film transistor is electrically coupled to the second node, and a drain is electrically coupled to the first node, and a source is electrically coupled to a third node;

a gate of the thirty-second thin film transistor is electrically coupled to the second node, and a drain is electrically coupled to the scan driving signal, and a source is electrically coupled to a first constant negative voltage level;

both a gate and a drain of the seventy-fifth thin film transistor are electrically coupled to the first node, and a source is electrically coupled to the third node;

a gate of the seventy-sixth thin film transistor is electrically coupled to the second node, and a drain is electrically coupled to the third node, and a source is electrically coupled to a second constant negative voltage level;

the second constant negative voltage level is lower than the first constant negative voltage level;

all the thin film transistors are oxide semiconductor thin film transistors;

the GOA unit circuit further comprises a reset module, employed to reset the first node before generating the each frame;

wherein the dual inverter comprises;

a fifty-first thin film transistor, and both a gate and a source of the fifty-first thin film transistor are electrically coupled to the constant high voltage level, and a drain is electrically coupled to a fourth node;

a fifty-second thin film transistor, and a gate of the fifty-second thin film transistor is electrically coupled to the first node, and a drain is electrically coupled to the fourth node, and a source is electrically coupled to the first constant negative voltage level;

a fifty-third thin film transistor, and a gate of the fifty-third thin film transistor is electrically coupled to the fourth node, and a source is electrically coupled to the constant high voltage level, and a drain is electrically coupled to the second node;

a fifty-fourth thin film transistor, and a gate of the fifty-fourth thin film transistor is electrically coupled to the first node, and a drain is electrically coupled to the second node, and a source is electrically coupled to a fifth node;

a seventy-third thin film transistor, and a gate of the seventy-third thin film transistor is electrically coupled to the fourth node, and a source is electrically coupled to the constant high voltage level, and a drain is electrically coupled to the fifth node;

a seventy-fourth thin film transistor, and a gate of the seventy-fourth thin film transistor is electrically coupled to the first node, and a source is electrically coupled to the second constant negative voltage level, and a drain is electrically coupled to the fifth node;

wherein the fifty-first thin film transistor, the fifty-second thin film transistor, the fifty-third thin film transistor and the fifty-fourth thin film transistor construct a main inverter, and the seventy-third thin film transistor and the seventy-fourth thin film transistor construct an auxiliary inverter;

wherein in the GOA unit circuit of the first stage, the gate of the eleventh thin film transistor receives a scan activation signal;

wherein the reset module comprises a ninth thin film transistor, and a gate of the ninth thin film transistor receives a reset signal, and a drain is electrically coupled to the first node, and a source is electrically coupled to the mth set of clock signal corresponding to the GOA unit circuit of the Nth stage;

the reset signal is generated before the scan activation signal.

14. The GOA circuit based on oxide semiconductor thin film transistor according to claim 13, wherein the reset module is provided in the GOA unit circuit of every stage.