Multi-Layer Ceramic Capacitor and Method of Producing the Same

• US 20160351335A1
• Filed: 05/27/2016
• Published: 12/01/2016
• Est. Priority Date: 05/29/2015
• Status: Active Grant

• Current Assignee: Taiyo Yuden Company Limited (Taiyo Yuden Co)
• Original Assignee: Taiyo Yuden Company Limited (Taiyo Yuden Co)
• Inventors: Mizuno, Kotaro, Konishi, Yukihiro, Kato, Yasunari, Wakayanagi, Hidenori, Kobayashi, Joji, Kogure, Toshimitsu, Kato, Yoichi, Sato, Yosuke
• Granted Patent: US 11,017,949 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01G 4/005 Electrodes
• CPC Class Codes: H01G 4/12 Ceramic dielectrics H01G4/085 takes precedence
• CPC Class Codes: H01G 4/232 electrically connecting two or more layers of a stacked or rolled capacitor
• CPC Class Codes: H01G 4/30 Stacked capacitors H01G4/33 takes precedence

Abstract

A multi-layer ceramic capacitor according to an embodiment of the present invention includes a multi-layer, side margins and offset sections. The multi-layer includes internal electrodes and dielectric layers alternately laminated. The side margins are configured of a dielectric and disposed to cover side faces of the multi-layer. The offset sections are made with amorphous areas or gap areas. The offset sections are formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer.

Claims

1. A multi-layer ceramic capacitor, comprising:

a multi-layer where internal electrodes and dielectric layers are alternately laminated;

side margins configured of a dielectric and disposed to cover side faces of the multi-layer; and

offset sections formed between the internal electrodes and the side margins such that ends at side faces of the internal electrodes are offset from the side faces to an inward direction of the multi-layer and made with amorphous areas or gap areas.

2. The multi-layer ceramic capacitor according to claim 1, where

a width of each offset section is 0.1 μ

m or more.

3. A method of producing a multi-layer ceramic capacitor, comprising:

forming a multi-layer where ceramic sheets configuring dielectric layers and electrical conductors configuring internal electrodes are alternately laminated;

cutting side faces of the multi-layer so as to expose the electrical conductors;

etching the exposed electrical conductors at the side faces of the multi-layer;

forming a capacitor body by disposing side margins composed of ceramic so as to cover the side faces of the multi-layer after etching; and

sintering the capacitor body.

4. The method of producing a multi-layer ceramic capacitor according to claim 3, wherein

etching is carried out with acid, by ion bombardment or by laser irradiation.

5. The method of producing a multi-layer ceramic capacitor according to claim 4, wherein

etching is carried out with nitric acid.

6. The method of producing a multi-layer ceramic capacitor according to claim 5, wherein

etching is carried out with concentrated nitric acid.

7. The method of producing a multi-layer ceramic capacitor according to claim 4, wherein

in the etching, laser is irradiated under the condition that the electrical conductors are selectively removed.

8. The method of producing a multi-layer ceramic capacitor according to claim 4, wherein

in the etching, the laser irradiation is carried out using nanosecond pulse laser, picosecond pulse laser or femtosecond pulse laser.

9. The method of producing a multi-layer ceramic capacitor according to claim 4, wherein

in the etching, the laser irradiation is carried out using green laser having a wavelength band of 532 nm, UV (ultraviolet) laser having a wavelength band of 355 nm or infrared ray laser having a wavelength band of 1064 nm.