VERTICAL THERMOELECTRIC STRUCTURES

• US 20160351772A1
• Filed: 05/23/2016
• Published: 12/01/2016
• Est. Priority Date: 08/20/2008
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Male, Barry Jon, Hower, Philip L.
• Granted Patent: US 10,446,734 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 23/38 Cooling arrangements using the Peltier effect
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H10N 10/13 characterised by the heat-exchanging means at the junction
• CPC Class Codes: H10N 10/17 characterised by the structure or configuration of the cell or thermocouple forming the device
• CPC Class Codes: H10N 10/855 comprising compounds containing boron, carbon, oxygen or nitrogen
• CPC Class Codes: H10N 19/00 Integrated devices, or assemblies of multiple devices, comprising at least one thermoelectric or thermomagnetic element covered by groups H10N10/00 - H10N15/00

Abstract

A thermoelectric device is disclosed which includes metal thermal terminals protruding from a top surface of an IC, connected to vertical thermally conductive conduits made of interconnect elements of the IC. Lateral thermoelectric elements are connected to the vertical conduits at one end and heatsinked to the IC substrate at the other end. The lateral thermoelectric elements are thermally isolated by interconnect dielectric materials on the top side and field oxide on the bottom side. When operated in a generator mode, the metal thermal terminals are connected to a heat source and the IC substrate is connected to a heat sink. Thermal power flows through the vertical conduits to the lateral thermoelectric elements, which generate an electrical potential. The electrical potential may be applied to a component or circuit in the IC. The thermoelectric device may be integrated into an IC without adding fabrication cost or complexity.

Claims

1. An integrated circuit including a thermoelectric device, comprising:

a metal thermal terminal at a top end of said thermoelectric device;

a vertical thermally conductive conduit, further comprising horizontal metal interconnect elements and vertical metal interconnect elements, which is thermally connected at a top end to said metal thermal terminal and configured so as to conduct heat vertically from said metal thermal terminal;

a lateral thermoelectric element, configured such that a first end of said lateral thermoelectric element is thermally connected to a bottom end of said vertical thermally conductive conduit, and a second end of said lateral thermoelectric element is thermally connected to a silicon substrate; and

a region of silicon dioxide thicker than 250 nanometers formed in said silicon substrate under said lateral thermoelectric element.

2. The thermoelectric device of claim 1, further including:

a second metal thermal terminal at said top end of said thermoelectric device;

a second vertical thermally conductive conduit, further including horizontal metal interconnect elements and vertical metal interconnect elements, which is thermally connected on a top end to said second metal thermal terminal and configured so as to conduct heat vertically from said second metal thermal terminal;

a second lateral thermoelectric element, configured such that a first end of said second lateral thermoelectric element is thermally connected to a bottom end of said second vertical thermally conductive conduit and is electrically connected to said first end of said first lateral thermoelectric element, and a second end of said second lateral thermoelectric element is thermally connected to said silicon substrate; and

a second region of silicon dioxide thicker than 250 nanometers formed in said silicon substrate under said second lateral thermoelectric element.

3. The thermoelectric device of claim 1, further including:

a second lateral thermoelectric element, of an opposite conductivity type than said first lateral thermoelectric element, configured such that a first end of said second lateral thermoelectric element is thermally connected to a bottom end of said vertical thermally conductive conduit, and a second end of said second lateral thermoelectric element is thermally connected to said silicon substrate;

a second metal thermal terminal at said top end of said thermoelectric device;

a second vertical thermally conductive conduit, further comprising horizontal metal interconnect elements and vertical metal interconnect elements, which is thermally connected on a top end to said second metal thermal terminal and configured so as to conduct heat vertically from said second metal thermal terminal;

a third lateral thermoelectric element, of the same conductivity type as said first lateral thermoelectric element, configured such that a first end of said third lateral thermoelectric element is thermally connected to a bottom end of said second vertical thermally conductive conduit, and a second end of said third lateral thermoelectric element is thermally connected to said silicon substrate and is electrically connected to said second end of said second lateral thermoelectric element;

a fourth lateral thermoelectric element, of the same conductivity type as said second lateral thermoelectric element, configured such that a first end of said fourth lateral thermoelectric element is thermally connected to a bottom end of said second vertical thermally conductive conduit, and a second end of said fourth lateral thermoelectric element is thermally connected to said silicon substrate;

a third region of silicon dioxide thicker than 250 nanometers formed in said silicon substrate under said third lateral thermoelectric element; and

a fourth region of silicon dioxide thicker than 250 nanometers formed in said silicon substrate under said fourth lateral thermoelectric element.

4. The thermoelectric device of claim 3, further including:

a first extension well of a same conductivity type as said first lateral thermoelectric element, formed in said silicon substrate, configured such that a first end of said first extension well contacts said first lateral thermoelectric element;

a second extension well of a same conductivity type as said second lateral thermoelectric element, formed in said silicon substrate, configured such that a first end of said second extension well contacts said second lateral thermoelectric element, and a second end of said second extension well contacts a second end of said first extension well;

a third extension well of a same conductivity type as said third lateral thermoelectric element, formed in said silicon substrate, configured such that a first end of said third extension well contacts said third lateral thermoelectric element; and

a fourth extension well of a same conductivity type as said fourth lateral thermoelectric element, formed in said silicon substrate, configured such that a first end of said fourth extension well contacts said fourth lateral thermoelectric element, and a second end of said fourth extension well contacts a second end of said third extension well.

5. The thermoelectric device of claim 1, in which said lateral thermoelectric element includes polycrystalline silicon.

6. The thermoelectric device of claim 1, further including an electrically insulating layer less than 20 nanometers thick formed in said vertical thermally conductive conduit such that a first subset of said horizontal metal interconnect elements and vertical metal interconnect elements is electrically isolated from remaining said horizontal metal interconnect elements and vertical metal interconnect elements.

7. The thermoelectric device of claim 1, further including a thermally insulating region formed under said region of silicon dioxide.

8. The thermoelectric device of claim 1, in which:

said silicon substrate is p-type; and

further comprising an n-type isolation well, formed in said silicon substrate under said second end of said lateral thermoelectric element, and electrically connected to said second end of said lateral thermoelectric element.

9. The thermoelectric device of claim 1, further including:

a dielectric layer less than 20 nanometers thick formed on a top surface of said silicon substrate, such that said second end of said lateral thermoelectric element contacts a top surface of said dielectric layer.

10. An integrated circuit, comprising:

a first metal thermal terminal formed at a top surface of said integrated circuit;

a second metal thermal terminal formed at said top surface of said integrated circuit;

a first vertical thermally conductive conduit formed in said integrated circuit, further comprising horizontal metal interconnect elements and vertical metal interconnect elements, which is thermally connected on a top end to said first metal thermal terminal and configured so as to conduct heat vertically from said first metal thermal terminal;

a second vertical thermally conductive conduit formed in said integrated circuit, further comprising horizontal metal interconnect elements and vertical metal interconnect elements, which is thermally connected on a top end to said second metal thermal terminal and configured so as to conduct heat vertically from said second metal thermal terminal;

a first lateral thermoelectric element formed in said integrated circuit, configured such that a first end of said first lateral thermoelectric element is thermally connected to a bottom end of said first vertical thermally conductive conduit, and a second end of said first lateral thermoelectric element is thermally connected to a silicon substrate of said integrated circuit;

a second lateral thermoelectric element formed in said integrated circuit, configured such that a first end of said second lateral thermoelectric element is thermally connected to a bottom end of said second vertical thermally conductive conduit, and a second end of said second lateral thermoelectric element is thermally connected to said silicon substrate of said integrated circuit;

a first region of silicon dioxide thicker than 250 nanometers formed in said silicon substrate under said first lateral thermoelectric element;

a second region of silicon dioxide thicker than 250 nanometers formed in said silicon substrate under said second lateral thermoelectric element;

a first electrically conducting element between an electrically negative end of said first lateral thermoelectric element and an electrically positive end of said second lateral thermoelectric element;

a second electrically conducting element between an electrically positive end of said first lateral thermoelectric element and a first transistor formed in said integrated circuit; and

a third electrically conducting element between an electrically negative end of said second lateral thermoelectric element and a second transistor formed in said integrated circuit.

11. The integrated circuit of claim 10, wherein said first lateral thermoelectric element is comprised of polycrystalline silicon;

and said second lateral thermoelectric element is comprised of polycrystalline silicon.

12. The integrated circuit of claim 11, further comprising:

a first electrically insulating layer less than 20 nanometers thick formed in said first vertical thermally conductive conduit such that a first subset of said horizontal metal interconnect elements and vertical metal interconnect elements contained in said first vertical thermally conductive conduit is electrically isolated from remaining said horizontal metal interconnect elements and vertical metal interconnect elements contained in said first vertical thermally conductive conduit; and

a second electrically insulating layer less than 20 nanometers thick formed in said second vertical thermally conductive conduit such that a first subset of said horizontal metal interconnect elements and vertical metal interconnect elements contained in said second vertical thermally conductive conduit is electrically isolated from remaining said horizontal metal interconnect elements and vertical metal interconnect elements contained in said second vertical thermally conductive conduit.

13. The integrated circuit of claim 10, further comprising:

a first thermally insulating region formed under said first region of silicon dioxide; and

a second thermally insulating region formed under said second region of silicon dioxide.

14. The integrated circuit of claim 10, wherein said silicon substrate is p-type;

and further comprising

a first n-type isolation well, formed in said silicon substrate under said second end of said first lateral thermoelectric element, and electrically connected to said second end of said first lateral thermoelectric element; and

a second n-type isolation well, formed in said silicon substrate under said second end of said second lateral thermoelectric element, and electrically connected to said second end of said second lateral thermoelectric element.

15. The integrated circuit of claim 10, further comprising:

a dielectric layer less than 20 nanometers thick formed on a top surface of said silicon substrate, such that said second end of said first lateral thermoelectric element contacts a top surface of said dielectric layer and said second end of said second lateral thermoelectric element contacts said top surface of said dielectric layer.