METHOD FOR MAKING ENHANCED SEMICONDUCTOR STRUCTURES IN SINGLE WAFER PROCESSING CHAMBER WITH DESIRED UNIFORMITY CONTROL
First Claim
1. A method for processing a semiconductor wafer in a single wafer processing chamber, the method comprising:
- heating the single wafer processing chamber to a temperature in a range of 650-700°
C.; and
forming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
wherein depositing the oxygen comprises depositing the oxygen using an N2O gas flow.
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Abstract
A method for processing a semiconductor wafer in a single wafer processing chamber may include heating the single wafer processing chamber to a temperature in a range of 650-700° C., and forming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions. Depositing the oxygen may include depositing the oxygen using an N2O gas flow.
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Citations
21 Claims
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1. A method for processing a semiconductor wafer in a single wafer processing chamber, the method comprising:
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heating the single wafer processing chamber to a temperature in a range of 650-700°
C.; andforming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions; wherein depositing the oxygen comprises depositing the oxygen using an N2O gas flow. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for processing a semiconductor wafer in a single wafer processing chamber, the semiconductor wafer comprising a plurality of spaced apart shallow trench isolation (STI) regions, the method comprising:
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heating the single wafer processing chamber to a temperature in a range of 650-700°
C.; andselectively forming a respective superlattice between adjacent pairs of STI regions on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions; wherein depositing the oxygen comprises depositing the oxygen using an N2O gas flow and at a pressure in a range of 10 to 100 Torr. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A method for processing a semiconductor wafer in a single wafer processing chamber, the method comprising:
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heating the single wafer processing chamber to a temperature in a range of 650-700°
C.; andforming a blanket superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions; wherein depositing the oxygen comprises depositing the oxygen using an N2O gas flow and at a pressure in a range of 10 to 100 Torr. - View Dependent Claims (17, 18, 19, 20, 21)
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Specification