SELF-ALIGNED FLASH MEMORY DEVICE WITH WORD LINE HAVING REDUCED HEIGHT AT OUTER EDGE OPPOSITE TO GATE STACK
First Claim
1. A flash memory device, comprising:
- a gate stack comprising a control gate separated from a floating gate by a control gate dielectric;
an erase gate disposed on a first side of the gate stack; and
a word line disposed on a second side of the gate stack that is opposite the first side, wherein the word line has a height that monotonically increases from an outer side opposite to the gate stack to an inner side closer to the gate stack;
wherein the word line comprises a ledge at the outer side of the word line with a planar upper surface, and a tilted portion at the inner side of the word line.
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Accused Products
Abstract
The present disclosure relates to a flash memory device, and associated methods. In some embodiments, the flash memory device has a gate stack with a control gate separated from a floating gate by a control gate dielectric. An erase gate disposed on a first side of the gate stack. A word line is disposed on a second side of the gate stack that is opposite the first side. The word line has a height that monotonically increases from an outer side opposite to the gate stack to an inner side closer to the gate stack. The shape of the word line optimizes the contact resistance of the word line and allows for an overlying cap spacer formed on the word line to be well defined, which can provide more reliable read/write operations and/or better performance.
9 Citations
26 Claims
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1. A flash memory device, comprising:
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a gate stack comprising a control gate separated from a floating gate by a control gate dielectric; an erase gate disposed on a first side of the gate stack; and a word line disposed on a second side of the gate stack that is opposite the first side, wherein the word line has a height that monotonically increases from an outer side opposite to the gate stack to an inner side closer to the gate stack; wherein the word line comprises a ledge at the outer side of the word line with a planar upper surface, and a tilted portion at the inner side of the word line. - View Dependent Claims (2, 4, 5, 6, 7, 8, 9, 10, 11)
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3. (canceled)
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12. An integrated circuit for a flash memory device, comprising:
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a common source/drain region shared by a pair of memory cells disposed in a substrate; a pair of gate stacks disposed at opposite sides of the common source/drain region over the substrate, wherein the pair of gate stacks respectively comprise a floating gate and a control gate arranged over the floating gate; a pair of word lines disposed at opposite sides of the gate stacks as the common source/drain region, wherein each of the pair of word lines has a height that monotonically increases from an outer side opposite to the gate stacks to an inner side closer to the gate stacks; a pair of sidewall spacers disposed along outer sidewalls of the word lines; an erase gate disposed over the common source/drain region between the gate stacks; and an erase gate cap spacer disposed over the erase gate, wherein an upper surface of the erase gate cap spacer is recessed. - View Dependent Claims (13, 14, 15)
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16-20. -20. (canceled)
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21. A flash memory device, comprising:
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a gate stack arranged over a substrate and comprising a control gate separated from a floating gate by a control gate dielectric; a word line disposed on one side of the gate stack wherein the word line has a height that monotonically increases from an outer side opposite to the gate stack to an inner side closer to the gate stack; a word line cap spacer disposed on the word line, including a ledge locating at an upper outer edge of the word line cap spacer; and a dielectric segment comprising a different material than the word line cap spacer, which is disposed on the ledge of the word line cap spacer and has an outer sidewall vertically aligned with outer sidewalls of the word line and the word line cap spacer. - View Dependent Claims (22, 23, 24, 25)
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26. A flash memory device, comprising:
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a gate stack comprising a control gate separated from a floating gate by a control gate dielectric; an erase gate disposed on a first side of the gate stack; and a word line disposed on a second side of the gate stack that is opposite the first side, wherein the word line has a ledge portion at an outer side opposite to the gate stack and surrounding a tilted portion at an inner side closer to the gate stack; wherein the ledge portion has a planar upper surface and a reduced height smaller than a height of the tilted portion at the inner side of the word line.
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Specification