JITTER IMPROVEMENT IN SERIALIZER-DESERIALIZER (SERDES) TRANSMITTERS

• US 20160359508A1
• Filed: 06/08/2016
• Published: 12/08/2016
• Est. Priority Date: 06/08/2015
• Status: Active Grant

• Current Assignee: Maxlinear Incorporated
• Original Assignee: Maxlinear Incorporated
• Inventors: Hadji-Abdolhamid, Amir, Ye, Sheng
• Granted Patent: US 10,014,888 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03K 3/01 Details
• CPC Class Codes: H03M 9/00 Parallel/series conversion or vice versa digital stores in which the information is moved stepwise per se G11C19/00
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/7174 Pulse generation in general H04L25/03834
• CPC Class Codes: H04B 15/02 Reducing interference from electric apparatus by means located at or near the interfering apparatus
• CPC Class Codes: H04L 1/205 jitter monitoring
• CPC Class Codes: H04L 43/087 Jitter
• CPC Class Codes: H04L 47/283 in response to processing delays, e.g. caused by jitter or round trip time [RTT]

Abstract

Systems and methods are provided for jitter improvement in serializer-deserializer (SerDes) transmitters. One or more adjustments may be applied in SerDes transmitter circuitry to reduce jitter in a serial output of the SerDes transmitter circuitry, which may occur as a result of processing of input data. Applying the one or more adjustments may comprise use of dummy data. The dummy data may be configured to generate corresponding dummy current pulses which may in turn be used in controlling supply variations occurring during processing of the input data and/or generation of the serial output. The dummy data may be configured to generate the dummy current pulses such that they are applied along with current pulses corresponding to the input data. The dummy data may be adaptively set or adjusted based on the input data. The use of the dummy data may be selectively turned on or off.

Claims

1. A method comprising:

in serializer/deserializer (SerDes) transmitter circuitry;

determining when jitter occurs during processing of input data for serial transmission;

applying one or more adjustments to reduce jitter in a serial output corresponding to the input data, wherein applying the one or more adjustments comprises use of dummy data during processing of the input data.

2. The method of claim 1, comprising adaptively setting or adjusting the dummy data based on the input data.

3. The method of claim 1, comprising selectively turning on or off the use of the dummy data in the SerDes transmitter circuitry.

4. The method of claim 1, comprising configuring the dummy data to generate corresponding dummy current pulses that are used in controlling supply variations during generation of the serial output.

5. The method of claim 4, comprising configuring the dummy data to generate the dummy current pulses to eliminate or reduce supply variations.

6. The method of claim 4, comprising configuring the dummy data to generate the dummy current pulses such that they are applied along with current pulses corresponding to the input data.

7. The method of claim 6, comprising configuring the dummy data to generate the dummy current pulses such that they are applied when the current pulses corresponding to the input data are not present.

8. The method of claim 6, comprising configuring the dummy data such that amplitude of the dummy current pulses is adjusted based on amplitude of the current pulses corresponding to the input data.

9. A system comprising:

a serializer/deserializer (SerDes) transmitter, the SerDes transmitter being operable to;

determine when jitter occurs during processing of input data for serial transmission;

apply one or more adjustments in the SerDes transmitter to reduce jitter in a serial output corresponding to the input data, wherein applying the one or more adjustments comprises use of dummy data during processing of the input data.

10. The system of claim 9, wherein the SerDes transmitter is operable to adaptively set or adjust the dummy data based on the input data.

11. The system of claim 9, wherein the SerDes transmitter is operable to selectively turn on or off the use of the dummy data in the SerDes transmitter.

12. The system of claim 9, wherein the SerDes transmitter is operable to configure the dummy data to generate corresponding dummy current pulses that are used in controlling supply variations during generation of the serial output.

13. The system of claim 12, wherein the SerDes transmitter is operable to configure the dummy data to generate the dummy current pulses such that to eliminate or reduce supply variations.

14. The system of claim 12, wherein the SerDes transmitter is operable to configure the dummy data to generate the dummy current pulses such that they are applied along with current pulses corresponding to the input data.

15. The system of claim 14, wherein the SerDes transmitter is operable to configure the dummy data to generate the dummy current pulses such that they are applied when the current pulses corresponding to the input data are not present.

16. The system of claim 14, wherein the SerDes transmitter is operable to configure the dummy data such that amplitude of the dummy current pulses is adjusted based on amplitude of the current pulses corresponding to the input data.

17. A system comprising:

a pulse generation circuit configured for generating programmable and adjustable dummy current pulses for use in serializer/deserializer (SerDes) transmitters, wherein the pulse generation circuit comprises;

one or more dummy load cells, wherein each dummy load cell is configurable to program load and complementary dummy current spikes; and

one or more control elements for controlling the one or more dummy load cells based on one or more input signals to the pulse generation circuit;

wherein;

the generated dummy current pulses are configurable for use in controlling supply variations during processing of input data for serializer/deserializer (SerDes) transmission;

the one or more control elements are arranged to control generation of dummy current pulses via the one or more dummy load cells based on the one or more input signals; and

the one or more input signals comprise at least one signal corresponding to the input data.

18. The system of claim 17, wherein the one or more control elements comprise one or more of n-channel transistors and p-channel transistors.

19. The system of claim 17, wherein the one or more control elements comprise one or more inverters.

20. The system of claim 17, wherein the pulse generation circuit is configured to generate the dummy current pulses to eliminate or reduce supply variations during processing of the input data.