COMMAND QUEUING

• US 20160364179A1
• Filed: 08/25/2016
• Published: 12/15/2016
• Est. Priority Date: 02/14/2014
• Status: Active Grant

• Current Assignee: Lodestar Licensing Group LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Tsai, Victor Y., Caraccio, Danilo, Balluchi, Daniele, Galbo, Neal A., Warren, Robert
• Granted Patent: US 10,146,477 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.

Claims

1-20. -20. (canceled)

21. A method for command queuing in a computing system, comprising:

receiving a queued command request at a memory system from a host;

sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system; and

receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host; and

placing, in response to receiving the command descriptor block, the command described by the command descriptor block in the command queue of the memory system.

22. The method of claim 21, wherein the command descriptor block includes priority information for the command.

23. The method of claim 22, wherein the priority information includes a parameter that indicates the command is placed in the command queue with highest priority for execution.

24. The method of claim 22, wherein the priority information includes a parameter that indicates the command is placed in the command queue with chronological priority for execution.

25. The method of claim 22, wherein the priority information includes a parameter that indicates the command is placed in the command queue without priority for execution.

26. The method of claim 21, wherein the command descriptor block for the command includes a command operation code, priority information, a task tag, a command argument, a starting address, and a block count.

27. The method of claim 21, wherein the method includes receiving the queued command request at the memory system when the memory system is in a Transfer state.

28. The method of claim 21, wherein the method includes changing the memory system from a Transfer state to a Receiving state in response to sending the command response.

29. The method of claim 21, wherein the method includes command queuing using an embedded MultiMediaCard (e.MMC) protocol.

30. The method of claim 21, wherein the method includes executing the command by receiving a ready to transfer commands at the memory system from the host.

31. A method for command queuing in a memory system, comprising:

executing a command by receiving a ready to transfer command at the memory system from a host and sending a data transfer request from the memory system to the host in response to receiving the ready to transfer command, wherein the data transfer request includes a data packet with information allowing for command execution on the host and memory system.

32. The method of claim 31, wherein executing the command includes receiving a receive data command at the memory system from the host when the command is a write command.

33. The method of claim 32, wherein, in response to receiving the receive data command from the host, the memory system transitions to a Receive state and the host sends data to the memory system.

34. The method of claim 31, wherein executing the command includes receiving a send data command at the memory system from the host when the command is a read command.

35. The method of claim 34, wherein, in response to receiving the send data command from the host, the memory system transitions to a Sending Data state and the memory system sends data to the host.

36. A method for command execution in a memory system, comprising:

executing a first number of commands by receiving a first number of ready to transfer commands at the memory system from a host and sending a first number of data transfer requests from the memory system to the host in response to receiving the first number of ready to transfer commands, wherein the first number of data transfer requests each includes a data packet with information allowing for command execution on the host and memory system; and

interrupting the execution of the first number of commands and executing a command from a second number of commands, wherein the command from the second number of commands include a parameter that indicates the command is placed in a command queue with highest priority for execution.

37. The method of claim 36, wherein the method includes executing the command from the second number of commands by receiving a ready to transfer command at the memory system from the host and sending a data transfer request from the memory system to the host in response to receiving the ready to transfer command, wherein the data transfer request includes a data packet with information allowing for command execution on the host and memory system.

38. The method of claim 36, wherein the method includes receiving the second number of a queued command requests at the memory system from the host on a command line while at least a portion of the first number of commands are being executed via data transfers on a data bus.

39. The method of claim 36, the method includes executing two or more of the first number of commands concurrently.

40. The method of claim 36, the method includes resuming execution of the first number of commands after execution of the command from the second number of commands has commenced.