STRIPE MAPPING IN MEMORY

• US 20160364181A1
• Filed: 06/10/2015
• Published: 12/15/2016
• Est. Priority Date: 06/10/2015
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: McGlaughlin, Edward, Jeddeloh, Joseph M.
• Granted Patent: US 9,766,837 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/10 Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
• CPC Class Codes: G06F 11/1012 using codes or arrangements adapted for a specific type of error G06F11/1048 takes precedence
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0629 Configuration or reconfiguration of storage systems
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Examples of the present disclosure provide apparatuses and methods related to redundant array of independent disks (RAID) stripe mapping in memory. An example method comprises writing data in a number of stripes across a storage volume of a plurality of memory devices according to a stripe map; wherein each of the number of stripes includes a number of elements; and wherein the stripe map includes a number of stripe indexes to identify the number of stripes and a number of element identifiers to identify elements included in each of the number of stripes.

Claims

1. A method for stripe mapping, comprising:

writing data in a number of stripes across a storage volume of a plurality of memory devices according to a stripe map;

wherein each of the number of stripes includes a number of elements; and

wherein the stripe map includes a number of stripe indexes to identify the number of stripes and a number of element identifiers to identify elements included in each of the number of stripes.

2. The method of claim 1, wherein the method includes creating the stripe map by associating each of the number of stripe indexes with a portion of the elements in the plurality of memory devices.

3. The method of claim 1, wherein the method includes creating the stripe map by associating each of the number of stripes with a parity element identifier.

4. The method of claim 1, wherein the method includes creating the stripe map by selecting the elements to include in the number of stripes based on a bit error rate associated with the elements.

5. The method of claim 1, wherein the method includes creating the stripe map by selecting the pages to include in the number of stripes based on a location of the pages within the plurality of memory devices.

6. The method of claim 1, wherein writing data in the number of stripes includes splitting the data into the number of elements and writing the number of elements to the plurality of memory devices.

7. The method of claim 6, wherein writing the number of elements to the plurality of memory devices includes writing at least one element to each of the plurality of memory devices.

8. The method of claim 6, wherein writing the number of elements to the plurality of memory devices includes writing at least one element to each of a subset of the plurality of memory devices.

9. The method of claim 8, wherein writing at least one element to each of a subset of the plurality of memory devices includes writing a respective page of the write data to each of a subset of the plurality of memory devices.

10. A method for stripe mapping, comprising:

storing a stripe map that includes element identifier information for each element associated with a number of stripes in memory, wherein each element associated with the number of stripes in included in a particular strip based a likelihood of an read error occurring in a particular element; and

writing data to the number of stripes in the memory, wherein the data is striped across the memory based on the element identifier information of the stripe map.

11. The method of claim 10, wherein storing the stripe map includes providing a physical address for each element associated with the number of stripes.

12. The method of claim 11, wherein the physical address for each element associated with the number of stripes includes channel, device, block, and page information.

13. The method of claim 10, wherein storing the stripe map includes providing a particular stripe index for each of the number of stripes.

14. The method of claim 10, wherein the stripe map includes pages with varied bit error rates included in each of the number of stripes.

15. The method of claim 10, wherein the stripe map includes pages with varied physical locations in the memory included in each of the number of stripes.

16. The method of claim 10, wherein the method includes storing an inverse stripe map, wherein the inverse stripe map is indexed by element and identifies each stripe that is associated with each particular element.

17. The method of claim 10, wherein the method includes updating the stripe map by replacing element identifiers of bad elements with element identifiers of different element.

18. The method claim 10, wherein the stripe map includes a particular number of elements associated with a particular stripe, wherein the particular number of elements is variable.

19. The method claim 10, wherein the stripe map includes a parity element identifier included in each of the number of stripes.

20. A method for stripe mapping, comprising:

storing a stripe map, wherein the stripe map is indexed by element and identifies each stripe that is associated with each particular element of a number of elements in a plurality of memory devices; and

performing a read error recovery operation by locating a bad element in the stripe map and updating each of the number of stripes associated with the bad element as indicated by the stripe map.

21. The method of claim 20, wherein updating each of the number of stripes includes replacing the element page with a new element.

22. The method of claim 20, wherein the method includes performing the read error recovery operation in response to an error correction code (ECC) operation failure.

23. The method of claim 20, wherein creating the stripe map includes identifying each of the particular elements with a page identifier.

24. The method of claim 20, wherein the method includes updating the stripe map by removing element identifiers of bad elements from the stripe map.

25. An apparatus, comprising:

a number of memory devices;

a controller coupled to the number of memory devices and configured to;

store a stripe map comprising element identifiers for each element of a number of stripes in the number of memory devices, wherein the stripe map defines particular elements of particular stripes; and

write data to the number of memory devices, wherein the data is written to elements of the number of stripes defined by the stripe map.

26. The apparatus of claim 25, wherein the element identifiers for each element includes channel, device, block, and page information.

27. The apparatus of claim 25, wherein the particular elements of particular stripes include varied bit error rates.

28. The apparatus of claim 25, wherein the particular elements of particular stripes include varied physical locations in the number of memory devices.

29. The apparatus of claim 25, wherein the varied physical locations are selected based on bit error rates associated with the physical locations.

30. The apparatus of claim 25, wherein any element of a number of elements can be included in a particular stripe.

32. The apparatus of claim 30, wherein the stripe map identifies each of the particular pages with a page identifier.

33. The apparatus of claim 30, wherein at least a portion of the stripe map is stored in the number of memory devices.

34. The apparatus of claim 30, wherein each of the number of stripes associated with the bad page is updated by including a new page in each of the number of stripes.

31. An apparatus, comprising:

a number of memory devices;

a controller coupled to the number of memory device and configured to;

store a stripe map that identifies particular pages and a number of stripes that are associated with each particular page; and

perform a RAID read error recovery operation by locating a bad page in the stripe map and updating each of the number of stripes associated with the bad page as indicated by the stripe map.