PRE-LAYER DEFECT SITE REVIEW USING DESIGN

• US 20160371831A1
• Filed: 06/16/2016
• Published: 12/22/2016
• Est. Priority Date: 06/19/2015
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation
• Original Assignee: KLA-Tencor Corporation
• Inventors: YATI, Arpit
• Granted Patent: US 9,940,704 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06T 2207/10061 from scanning electron microscope
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/0004 Industrial image inspection
• CPC Class Codes: G06T 7/0006 using a design-rule based approach
• CPC Class Codes: G06T 7/33 using feature-based methods
• CPC Class Codes: G06T 7/337 involving reference images or patches

Abstract

A system and method to image a layer of a wafer based on a coordinate of a defect in a pre-layer of the wafer are disclosed. A design file for the current layer can be aligned to the wafer using an image of the current layer. A design file for a previous layer can be aligned to the design file for the current layer.

Claims

1. A system comprising:

a defect review tool, wherein the defect review tool includes;

a stage configured to clamp a wafer; and

an image generation system configured to generate an image of a layer of a surface of the wafer; and

a controller configured to communicate with the defect review tool, wherein the controller is configured to;

align a design file for a current layer of the wafer to an image of the current layer;

align a design file for a previous layer of the wafer to the design file for the current layer, wherein the previous layer is formed prior to the current layer; and

identify a region of the image of the current layer based on a coordinate of a defect in the previous layer, wherein the region corresponds to the coordinate of the defect in the previous layer.

2. The system of claim 1, wherein the controller includes a processor, a storage device in electronic communication with the processor, and a communication port in electronic communication with the processor.

3. The system of claim 1, wherein at least one die corner of the wafer is marked.

4. The system of claim 3, wherein the controller is further configured to adjust the die corners to a die coordinate system for the previous layer after aligning the design file for the previous layer.

5. The system of claim 1, wherein the controller is further configured to deskew the image of the current layer.

6. The system of claim 1, wherein the image of the current layer is a scanning electron microscope image.

7. The system of claim 1, wherein the controller is further configured to generate a coordinate system for the current layer and generate a corresponding coordinate system for the previous layer.

8. The system of claim 1, wherein the controller is further configured to align an image of the previous layer to at least one of the design file for the previous layer or the design file for the current layer.

9. The system of claim 1, wherein the image generation system is configured to use at least one of an electron beam, a broad band plasma, or a laser.

10. A method comprising:

aligning a wafer in a defect review tool using a stage;

marking at least one die corner of the wafer;

aligning using a controller a design file for a current layer of the wafer to an image of the current layer;

aligning using the controller a design file for a previous layer of the wafer to the design file for the current layer, wherein the previous layer is formed prior to the current layer; and

identifying a region of the image of the current layer based on a coordinate of a defect in the previous layer using the controller, wherein the region corresponds to the coordinate of the defect in the previous layer.

11. The method of claim 10, further comprising adjusting the die corners to a die coordinate system for the previous layer after aligning the design file for the previous layer.

12. The method of claim 10, further comprising generating lots with defect site images of the current layer and the previous layer using the controller.

13. The method of claim 10, further comprising deskewing the image of the current layer using the controller.

14. The method of claim 10, wherein the image of the current layer is a scanning electron microscope image.

15. The method of claim 10, further comprising generating a coordinate system for the current layer and generating a corresponding coordinate system for the previous layer using the controller.

16. The method of claim 10, further comprising aligning an image of the previous layer to at least one of the design file for the previous layer or the design file for the current layer.

17. The method of claim 10, further comprising identifying, using the controller, the location of a defect in an image of the previous layer prior to identifying the region of the image of the current layer.

18. The method of claim 17, further comprising aligning the image of the previous layer to the design file for the previous layer.