ORGANIC LIGHT EMITTING DIODE (OLED) DISPLAY AND DRIVING METHOD THEREOF

• US 20160379571A1
• Filed: 06/21/2016
• Published: 12/29/2016
• Est. Priority Date: 06/26/2015
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: KIM, Jungchul, KWON, Junyoung
• Granted Patent: US 10,535,300 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

Provided is an organic light emitting diode (OLED) display which includes a driving circuit and pixels arranged on pixel rows. In a (j−1)-th horizontal period, the driving circuit samples a threshold voltage of a driving Transistor (DT) of each pixel arranged on the (j−1)-th pixel row, and initializes a voltage of a gate electrode of a driving TFT of each pixel arranged on the j-th pixel row. In addition, in a j-th horizontal period, the driving circuit samples a threshold voltage of the driving TFT of each pixel arranged on the j-th pixel row.

Claims

1. An organic light emitting diode (OLED) display comprising:

a plurality of pixels arranged on n number of pixel rows including a j-th pixel row, wherein n and j are integers and j is equal to or smaller than n; and

a driving circuit comprising a gate driver that supplies a scan signal to each pixel row and a data driver that supplies data voltages to pixels arranged on a pixel row supplied with the scan signal,

wherein, in a (j−

1)-th horizontal period during which the scan signal is supplied to a (j−

1)-th pixel row, the driving circuit samples a threshold voltage of a driving transistor in each pixel arranged on the (j−

1)-th pixel row, and initializes a voltage of a gate electrode of a driving transistor in each pixel arranged on the j-th pixel row.

2. The OLED display of claim 1, wherein, in a j-th horizontal period during which the scan signal is supplied to the j-th pixel row, the data driver supplies the data voltage to pixels arranged on the j-th pixel row.

3. An organic light emitting diode (OLED) display comprising:

a display panel in which a plurality of pixels arranged on n number of pixel rows including a j-th pixel row, wherein n and j are integers and j is equal to or smaller than n, first to second scan lines connected to pixels in each pixel row, an emission line, a reference voltage line, and a data line are arranged;

a gate driver that supplies first and second scan signals to the first and second scan lines, respectively, and that supplies an emission signal to the emission line; and

a data driver that supplies a data voltage to the data line,

wherein each of the plurality of pixels comprises;

a driving Transistor (DT) including a gate electrode connected to a node A, a source electrode connected to a node B, and a drain electrode connected to a high-potential driving voltage input terminal;

a first transistor connected to the node A and a node B, and capable of being turned on turned on by the first scan signal received through the first scan line;

a second transistor connected to the node B and a node C connected to an anode electrode of an OLED, and capable of being turned on by the emission signal received through the emission line;

a third transistor connected to the node C and the reference voltage line, and capable of being turned on by the first scan signal;

a fourth transistor connected to the node D and the reference voltage line, and capable of being turned on by the emission signal;

a fifth transistor connected to the node D and the data line, and capable of being turned on by the second scan signal received through the second scan line; and

a storage capacitor including a first electrode connected to the node A, and a second electrode connected to a node D.

4. The OLED display of claim 3, wherein:

in a (j−

1)-th horizontal period during which the first scan signal is supplied to a (j−

1)-th pixel row,

a fourth transistor of each pixel arranged on the j-th pixel row initializes the node D in accordance with the emission signal, and

first and third transistors of each pixel arranged on the j-th pixel row are turned on by the first scan signal, and a second transistor of each pixel arranged on the j-th pixel row is turned on by the emission signal, so that the node A is initialized to a reference voltage.

5. The OLED display of claim 4, wherein:

in a j-th horizontal period during which the first scan signal is supplied to the j-th pixel row,

the first transistor of each pixel arranged on the j-th pixel row is turned on by the first scan signal and thereby establishes a diode connection of the nodes A and B, so that the node A is charged to a high-potential driving voltage which is supplied from the high-potential driving voltage input terminal.

6. The OLED display of claim 5, wherein, in the j-th horizontal period, a fifth transistor of each pixel arranged on the j-th pixel row is turned on by the second scan signal, so that the node D is charged to the data voltage.

7. The OLED display of claim 6, wherein, in a (j+1)-th horizontal period during which the first scan signal is supplied to a (j+1)-th pixel row, the fourth transistor of each pixel arranged on the j-th pixel row is turned on by the emission signal, so that the nodes D is charged to the reference voltage.

8. The OLED display of claim 7,

wherein, in the (j+1)-th horizontal period, the second transistor of each pixel arranged on the j-th pixel row connects the nodes B and C in response to the emission signal, and

wherein the OLED emits a light with a voltage variance of the node D being reflected to the node A when the j-th horizontal period proceeds into the (j+1)-th horizontal period.

9. The OLED display of claim 3, wherein at least one of the second to fifth transistors has a double-gate structure.

10. A driving method of an organic light emitting diode (OLED) display in which a plurality of pixels are arranged on n number of pixel rows including a j-th pixel row, wherein n and j are integers and j is equal to or smaller than n, the driving method comprising:

in a (j−

1)-th horizontal period during which a scan signal is supplied to a (j−

1)-th pixel row, a threshold voltage of a driving thin film transistor (TFT) of each pixel arranged on the (j−

1)-th pixel row is sampled, and a voltage of a gate electrode of a driving TFT of each pixel arranged on the j-th pixel row is initialized;

in a j-th horizontal period during which the scan signal is supplied to the j-th pixel row, a threshold voltage of the driving TFT of each pixel arranged on the j-th pixel row is sampled, and a data voltage is charged in each pixel arranged on the j-th pixel row; and

in a (j+1)-th horizontal period during which the scan signal is supplied to a (j+1)-th pixel row, an OLED in each pixel arranged on the j-th pixel row is caused to emit a light according to the data voltage charged.