Concurrent Program Execution Optimization
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Abstract
An architecture for a load-balanced groups of multi-stage manycore processors shared dynamically among a set of software applications, with capabilities for destination task defined intra-application prioritization of inter-task communications (ITC), for architecture-based ITC performance isolation between the applications, as well as for prioritizing application task instances for execution on cores of manycore processors based at least in part on which of the task instances have available for them the input data, such as ITC data, that they need for executing.
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Citations
40 Claims
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1-20. -20. (canceled)
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21. A system for processing a set of computer programs instances comprising:
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a number of processing stages, at least one of which comprises multiple processing cores, with, for at least one of the cores, one of the program instances assigned for execution for a period of time; and a group of multiplexers connecting inter-task communications (ITC) data to a given stage among the processing stages, wherein at least one of the multiplexers is a hardware resource specific to one given program instance among said set, wherein the system is configured to host each task of the given program instance at different one of the processing stages, while supporting copies of same given task located at more than one of the processing stages.
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28. A method for prioritizing instances of a program for execution, comprising:
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classifying the instances into priority classes based at least in part on (i) whether a given instance is waiting for arrival of input data at input buffers of the given instance, and (ii) whether a given instance is waiting for completion of memory content transfers to update fast-access memories of the given instance; and selecting some of the instances for execution based at least in part based on the classification.
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29. The method of claim 29, wherein:
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each of the input buffers of the given instance is specific to one of a set of possible data sources for said instance, the given instance ranks said data sources into priority levels including (i) high priority sources and (ii) other sources, with the input buffers of the given instance specific to its high priority data sources referred to as high-priority buffers, and the given instance is deemed to be waiting for arrival of input data at its input buffers when at least one of its high-priority buffers is empty. - View Dependent Claims (32, 33, 34, 35, 36)
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- 30. The method of claim 30, wherein a given data source among said set is ranked as a high priority source at a given time if the given instance is expecting such data from the given data source that enables said instance to execute.
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37. A control system for an array of processing cores shared among a set of software programs, the system including:
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a collection of fast-access memories, wherein each memory in the collection is a hardware resource constantly dedicated to its associated instance of the programs; a subsystem for updating contents of the fast-access memories under control by the program instance associated with each given fast-access memory of the collection and indicating whether the contents of any given memory in the collection are updated, with such contents indicated as updated when they are ready for execution of the associated program instance; and a controller for allocating the cores among the programs, for execution of their instances, at least in part based on numbers of such instances of individual programs of said set that have their dedicated fast-access memories indicated as updated by said subsystem. - View Dependent Claims (38, 39, 40)
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Specification