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STRUCTURE AND FORMATION METHOD FOR CHIP PACKAGE

  • US 20170005072A1
  • Filed: 01/21/2016
  • Published: 01/05/2017
  • Est. Priority Date: 07/02/2015
  • Status: Active Grant
First Claim
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1. A chip package, comprising:

  • a chip stack including a plurality of semiconductor dies;

    a semiconductor chip, wherein the semiconductor chip is higher than the chip stack; and

    a package layer covering a top and sidewalls of the chip stack and sidewalls of the semiconductor chip.

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