Method for Producing an Integrated Circuit Device with Enhanced Mechanical Properties

• US 20170011956A1
• Filed: 07/08/2016
• Published: 01/12/2017
• Est. Priority Date: 07/08/2015
• Status: Abandoned Application

• Current Assignee: IMEC International
• Original Assignee: IMEC International
• Inventors: DE WOLF, Ingrid, BMMELS, Jrgen
• Application Number:
  US15/205,614
• Publication Number:
  US 20170011956A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76825 by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc. plasma treatment H01L21/76826
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 2224/02372 connecting to a via connection in the semiconductor or solid-state body
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 24/02 Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto

Abstract

Devices and methods for producing an integrated circuit device, comprising a front-end-of-line (FEOL) portion and a back-end-of-line (BEOL) portion, are disclosed. The metallization layers comprise dielectric layers, preferably low-k dielectric layers, with metal conductors and/or interconnect structures incorporated within the dielectric layers. In an exemplary device, in at least some of the metallization layers of the BEOL stack, the elastic modulus of the dielectric material varies from one area of the layer to one or more other areas of the layer. In some implementations, a mask layer is applied on the BEOL stack or on one of the metallization layers during fabrication of the stack, the mask layer covering portions of the stack area and exposing other portions of the area. Then, a treatment is performed that changes the elastic modulus of the dielectric material in one or more of the metallization layers, but only in areas uncovered by the mask layer.

Claims

1. A method for producing an integrated circuit device comprising a front-end-of-line portion and a back-end-of-line portion, the BEOL portion comprising a metallization stack comprising metallization layers, each metallization layer comprising a layer of dielectric material with metal lines and/or metal vias embedded in the dielectric layer, the stack having a stack surface area, the method comprising the steps of:

building the metallization stack by a sequence of processing steps wherein subsequent metallization layers are formed;

during or after the sequence, producing a mask layer on the partially or fully completed stack, the mask layer covering one or more portions of the stack surface area and leaving one or more portions of the stack surface area exposed; and

performing a treatment that changes the elastic modulus of the dielectric material of one or more of the metallization layers on which the mask layer is produced, only in the exposed portion(s) of the stack surface area.

2. The method according to claim 1, wherein the stack is produced by a sequence of process steps, each step comprising:

depositing a layer of the dielectric material; and

forming the metal lines and/or vias in the dielectric layers by a trench formation and a trench filling process, wherein the mask layer is produced on one of the dielectric layers, before or after the trench formation and filling processes.

3. The method according to claim 1, wherein the stack is formed by a sequence of process steps, each step comprising:

depositing a metal layer;

patterning the metal layer to form the metal lines and/or vias; and

depositing the dielectric material to form the metallization layers, wherein the mask layer is produced on one of the metallization layers, after deposition of the dielectric material.

4. The method according to claim 1, wherein the dielectric material is a porous low-k material.

5. The method according to claim 1, wherein the treatment is a UV radiation treatment, thereby increasing the elastic modulus of the dielectric material of at least the metallization layer closest to the mask layer, in the exposed portion(s) of the stack surface area.

6. The method according to claim 5, wherein the UV radiation treatment comprises using essentially monochromatic UV radiation, with a wavelength between 120 nm and 200 nm.

7. The method according to claim 5, wherein the mask layer is produced on a passivation layer applied on top of the metallization stack.

8. The method according to claim 2, wherein the dielectric material of the layer on which the mask layer is produced is a porous low-k dielectric material, and wherein the treatment comprises:

applying a liquid pore-filling material to the exposed portion(s) of the stack surface area, so as to allow the liquid to penetrate the pores of the dielectric material of the dielectric layer on which the mask layer is produced, in the exposed areas; and

a heating step to a temperature above the glass-forming temperature of the pore-filling material, thereby increasing the elastic modulus of the dielectric material in the exposed areas of the dielectric layer on which the mask layer is produced.

9. The method according to claim 2, wherein the dielectric material of the layer on which the mask layer is produced is a porous low-k material comprising a porogen in the pores of the material, and wherein the treatment is a porogen-removing treatment, configured to remove at least an amount of the porogen from the pores in the exposed portion(s) of the dielectric layer on which the mask layer is produced, thereby decreasing the elastic modulus of the dielectric material in the exposed portions.

10. The method according to claim 1, wherein the mask layer is a metal layer.

11. The method according to claim 1, wherein the mask layer is a polymer layer.

12. The method according to claim 1, wherein a redistribution layer is applied on top of the metallization stack, the redistribution layer comprising metal structures for connecting the metallization stack to structures that are external to the device, and wherein the metal portions are used as the mask layer.

13. The method according to claim 1, wherein the covered or exposed portion comprises a sub-portion of the stack surface area that comprises a strip running along and including the edge of the stack surface area, and wherein the treatment is chosen so that in at least one of the metallization layers, the dielectric material has a higher elastic modulus in the sub-portion of the stack surface area compared to the dielectric material adjacent to the sub-portion.

14. The method according claim 1, wherein the mask layer is a shadow mask that is removably positioned in contact with or at a distance from a layer of the partially or fully completed stack or on a passivation layer present on top of the stack.

16. The method according claim 2, wherein the treatment is a UV radiation treatment, thereby increasing the elastic modulus of the dielectric material of at least the metallization layer closest to the mask layer, in the exposed portion(s) of the stack surface area.

17. The method according to claim 16, wherein the UV radiation treatment comprises using essentially monochromatic UV radiation, with a wavelength between 120 nm and 200 nm.

18. The method according to claim 17, wherein the covered or exposed portion comprises a sub-portion of the stack surface area that comprises a strip running along and including the edge of the stack surface area, and wherein the treatment is chosen so that in at least one of the metallization layers, the dielectric material has a higher elastic modulus in the sub-portion of the stack surface area compared to the dielectric material adjacent to the sub-portion.

19. The method according to claim 3, wherein the dielectric material of the layer on which the mask layer is produced is a porous low-k dielectric material, and wherein the treatment comprises:

applying a liquid pore-filling material to the exposed portion(s) of the stack surface area, so as to allow the liquid to penetrate the pores of the dielectric material of the dielectric layer on which the mask layer is produced, in the exposed areas; and

a heating step to a temperature above the glass-forming temperature of the pore-filling material, thereby increasing the elastic modulus of the dielectric material in the exposed areas of the dielectric layer on which the mask layer is produced.

20. The method according to claim 3, wherein the dielectric material of the layer on which the mask layer is produced is a porous low-k material comprising a porogen in the pores of the material, and wherein the treatment is a porogen-removing treatment, configured to remove at least an amount of the porogen from the pores in the exposed portion(s) of the dielectric layer on which the mask layer is produced, thereby decreasing the elastic modulus of the dielectric material in the exposed portions.

15. An integrated circuit device comprising:

a front-end-of-line portion; and

a back-end-of-line portion, the BEOL portion comprising a metallization stack of metallization layers, each metallization layer comprising a dielectric layer with metal lines and/or metal vias embedded in the dielectric layer, wherein in at least one of the metallization layers of the metallization stack, the elastic modulus of the dielectric layer varies from one area of the dielectric layer to one or more other areas of the dielectric layer.