Array Substrate and Manufacturing Method Thereof, Display Device
First Claim
1. A manufacturing method of an array substrate, which includes a step of forming a pattern including a pixel electrode;
- andthe manufacturing method further includes a step of forming a pattern including an active layer after the step of forming the pattern including the pixel electrode.
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Abstract
A manufacturing method of an array substrate is disclosed. The manufacturing method includes a step of forming a pattern including a pixel electrode; and the manufacturing method further includes a step of forming a pattern including an active layer after the step of forming the pattern including the pixel electrode. Accordingly, an array substrate and a display device are also disclosed. In the manufacturing process of the array substrate, conductive material remained on the active layer is less, thereby producing less leak current, which in turn improves quality of the array substrate and display performance of the display device.
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Citations
20 Claims
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1. A manufacturing method of an array substrate, which includes a step of forming a pattern including a pixel electrode;
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the manufacturing method further includes a step of forming a pattern including an active layer after the step of forming the pattern including the pixel electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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- 10. An array substrate, which includes a thin film transistor and a pixel electrode, wherein the pixel electrode is located under a layer where an active layer of the thin film transistor is located, and is insulated and spaced from the active layer, the pixel electrode being electrically connected with a drain of the thin film transistor.
- 17. A display device, which includes an array substrate, the array substrate including a thin film transistor and a pixel electrode, wherein the pixel electrode is located under a layer where an active layer of the thin film transistor is located, and is insulated and spaced from the active layer, the pixel electrode being electrically connected with a drain of the thin film transistor.
Specification