Controller IC with Zero-Crossing Detector and Capacitor Discharge Switching Element

• US 20170012543A1
• Filed: 09/24/2016
• Published: 01/12/2017
• Est. Priority Date: 08/28/2013
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Lund, Leif, Kung, David
• Granted Patent: US 9,985,542 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01R 19/14 Indicating direction of current; Indicating polarity of voltage
• CPC Class Codes: G01R 19/175 Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
• CPC Class Codes: H02M 1/0006 Arrangements for supplying an adequate voltage to the control circuit of converters
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 1/322 Means for rapidly discharging a capacitor of the converter for protecting electrical components or for preventing electrical shock
• CPC Class Codes: H02M 1/44 Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
• CPC Class Codes: H02M 3/33546 with automatic control of the output voltage or current H02M3/33561 takes precedence
• CPC Class Codes: H03K 5/1536 Zero-crossing detectors in measuring circuits G01R19/175

Abstract

An integrated circuit (IC) for controlling the discharge of a capacitor coupled across first and second input terminals of a power converter circuit, wherein the first and second terminals for receiving an ac line voltage. The IC includes a switching element coupled across the first and second input terminals and a detector circuit. The detector circuit including first and second comparators that produce first and second output signals responsive to a zero-crossing event of the ac line voltage. The first and second output signals being used to generate a reset signal coupled to a timer circuit responsive to the zero-crossing event. When the reset signal is not received within a delay time period, the timer circuit outputs a discharge signal that turns the switching element on, thereby discharging the capacitor.

Claims

1. An integrated circuit (IC) comprising:

a power converter controller to regulate an output of a power converter, the power converter having first and second input terminals to receive an ac line voltage, an x-capacitor being coupled across the first and second input terminals;

a regulator circuit configured to regulate a supply voltage provided to the power converter controller;

a discharge circuit, which includes;

a switching element for coupling across the first and second input terminals; and

a detector Circuit coupled to the switching element the detector circuit comprising;

first and second comparators, each having a first input respectively coupled to the first and second input terminals, the first and second comparators respectively producing first and second output signals responsive to a zero-crossing event of the ac line voltage;

circuitry coupled to receive the first and second output signals, the circuitry outputting a discharge signal when neither the first nor second output signals are received within a delay time period, the discharge signal being coupled to activate the switching element, when activated, the switching element providing a discharge path to discharge a voltage across the x-capacitor.

2. The IC of claim 1 wherein the circuitry comprises:

a logic circuit coupled to receive the first and second output signals, the logic circuit outputting a reset signal responsive to the first and second output signals; and

a timer circuit coupled to receive the pulsed reset signal, the timer circuit outputting the discharge signal when the reset signal is not received within the delay time period.

3. The IC of claim 1 wherein the switching element comprises first and second high-voltage transistor switches coupled in series across the first and second input terminals.

4. The IC of claim 3 wherein the switching element further comprises first and second junction field-effect transistors (JFETs), the first JFET being coupled to the first high-voltage transistor switch at a first node, and the second JFET being coupled to the second high-voltage transistor switch at a second node, the first and second nodes being respectively coupled to the first and second comparators.

5. The IC of claim 2 wherein the timer circuit includes a timing capacitor that discharges responsive to the reset signal.

6. The IC of claim 1 wherein the first and second comparators comprise low-voltage devices.

7. The IC of claim 1 wherein the first input of the first and second comparators comprises a positive input, a negative input of each of the first and second comparators being coupled to a reference voltage.

8-28. -28. (canceled)

29. An integrated circuit (IC) comprising:

a power converter controller to regulate an output of a power converter;

the power converter having first and second input terminals to receive an ac line voltage; and

an x-capacitor discharge circuit which includes;

a first switch coupled to the first input terminal;

a second switch coupled to the second input terminal; and

a zero-crossing detector circuit coupled to turn on the first switch in the absence of a zero-crossing event.

30. The IC of claim 29 wherein the zero-crossing event occurs over a predetermined delay time of an ac line cycle period.

31. The IC of claim 29 wherein the first input terminal s coupled to a first resistor.

32. The IC of claim 29 wherein the second input terminal is coupled to a second resistor.

33. The IC of claim 29 wherein the zero-crossing detector circuit is coupled to turn on the second switch in response to the ac line voltage being disconnected.

34. The IC of claim 29 wherein the x-capacitor discharge circuit and the power converter controller are coupled to a regulated supply voltage.

36. The IC of claim 29 wherein the second switch s a second high-voltage field-effect transistor.

37. The IC of claim 29 wherein a first junction field-effect transistor (JFET) is coupled to the first switch.

8. The IC of claim 37 wherein a second JFET is coupled to the second switch.

39. The IC of claim 29 wherein the zero-crossing detector further includes a timer circuit that is coupled to close the first switch in response to the absence of the zero-crossing event.

35. The IC of 29 wherein the firs witch is a first high-voltage field-effect transistor.

40. An integrated circuit (IC) comprising:

a power converter controller to regulate an output of a power converter;

the power converter having first and second input terminals to receive an ac line voltage; and

an x-capacitor discharge circuit which includes;

a first switch coupled to the first input terminal;

a second switch coupled to the second input terminal; and

a zero-crossing detector circuit coupled to turn on the first switch when the ac line voltage is disconnected from the first and second input terminals.

41. The IC of claim 40 wherein the first input terminal is coupled to a first resistor.

42. The IC of claim 40 wherein the second input terminal is coupled to a second resistor.

43. The IC of claim 40 wherein the x-capacitor discharge circuit and the power converter controller are coupled to a regulated supply voltage.

44. The IC of claim 40 wherein the switch is a first high-voltage field-effect transistor.

45. The IC of claim 40 wherein the second switch is a second high-voltage field-effect transistor.

46. The IC of claim 40 wherein a first junction field-effect transistor (JFET) is coupled to the first switch.

47. The IC of claim 46 wherein a second JFET is coupled to the second switch.