PHASE-LOCKED LOOP HAVING A MULTI-BAND OSCILLATOR AND METHOD FOR CALIBRATING SAME

• US 20170012631A1
• Filed: 07/08/2015
• Published: 01/12/2017
• Est. Priority Date: 07/08/2015
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices Global Unlimited Company (Analog Devices, Inc.)
• Inventors: Dato, Pablo Cruz, Dalton, Declan D., Crowley, Patrick G.
• Granted Patent: US 10,727,848 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 2207/50 All digital phase-locked loop
• CPC Class Codes: H03L 7/0818 the controlled phase shifter comprising coarse and fine delay or phase-shifting means
• CPC Class Codes: H03L 7/091 the phase or frequency detector using a sampling device H03L7/087 takes precedence
• CPC Class Codes: H03L 7/0992 comprising a counter or a frequency divider
• CPC Class Codes: H03L 7/0994 comprising an accumulator

Abstract

A phase-locked loop (PLL) comprising a multi-band oscillator and a memory configured to store control input for the oscillator. The PLL is operable in a calibration mode in which the PLL is configured to acquire a frequency controlled word (FCW) for the PLL corresponding to a frequency generated by the oscillator in response to a first control input threshold on a first band of the oscillator; generate a frequency corresponding to said FCW on a second band of the oscillator adjacent to said first band; identify a second control input causing the oscillator to generate said frequency corresponding to said FCW and store said second control input in memory.

Claims

1. A phase-locked loop (PLL) comprising a multi-band oscillator and a memory configured to store a control input for the oscillator, wherein the PLL is operable in a calibration mode in which the PLL is configured to:

acquire a frequency controlled word (FCW) for the PLL corresponding to a frequency generated by the oscillator in response to a first control input threshold on a first band of the oscillator;

generate a frequency corresponding to said FCW on a second band of the oscillator adjacent to said first band; and

identify a second control input causing the oscillator to generate said frequency corresponding to said FCW and store said second control input in said memory.

2. The PLL of claim 1, further comprising a filter configured to provide said oscillator with a coarse control input and a fine control input in a normal mode of operation of the PLL.

3. The PLL of claim 2, wherein said filter is further configured to connect to an input of the PLL in order to acquire said FCW in said calibration mode of the PLL.

4. The PLL of claim 2, wherein said first control input threshold is a fine control input of said oscillator.

5. The PLL of claim 1, wherein the PLL is configured to perform acquiring, generating, identifying and the storing for each band of the oscillator successively.

6. The PLL of claim 1, wherein prior to said acquiring of the FCW, the PLL is further configured to set the control input to said first control input threshold.

7. The PLL of claim 1, wherein for each band of the oscillator the PLL is further configured to store in said memory a further control input generating said FCW on another adjacent band of the oscillator.

8. The PLL of claim 1, wherein the PLL is a digital PLL, the oscillator is a Digitally Controlled Oscillator (DCO) configured to receive a coarse digital control input and a fine digital control input, the first digital control input threshold being a fine digital control input.

9. A frequency modulated continuous wave (FMCW) radar device comprising a frequency ramp generator configured to produce a frequency ramp signal, and a transceiver configured to transmit and receive said frequency ramp signal, the frequency ramp generator having a phase-locked loop (PLL) comprising a multi-band oscillator, and a memory configured to store control input for the oscillator, wherein the PLL is operable in a calibration mode in which the PLL is configured to:

acquire a frequency controlled word (FCW) for the PLL corresponding to a frequency generated by the oscillator in response to a first control input threshold on a first band of the oscillator;

generate a frequency corresponding to said FCW on a second band of the oscillator adjacent to said first band; and

identify a second control input causing the oscillator to generate said frequency corresponding to said FCW and store said second control input in said memory.

10. The FMCW radar device of claim 9, wherein the PLL further comprises a filter configured to provide said oscillator with a coarse control input and a fine control input in a normal mode of operation of the PLL.

11. The FMCW radar device of claim 10, wherein said filter is further configured to connect to an input of the PLL in order to acquire said FCW in said calibration mode of the PLL.

12. The FMCW radar device of claim 10, wherein said first control input threshold is a fine control input of said oscillator.

13. The FMCW radar device of claim 9, wherein the PLL is configured to perform acquiring, generating, identifying and the storing for each band of the oscillator successively.

14. The FMCW radar device of claim 9, wherein prior to said acquiring of the FCW, the PLL is further configured to set a control input of the oscillator to said first control input threshold.

15. The FMCW radar device of claim 9, wherein for each band of the oscillator the PLL is further configured to store in said table a further control input generating said FCW on another adjacent band of the oscillator.

16. The FMCW radar device of claim 9, wherein the PLL is a digital PLL, the oscillator is a Digitally Controlled Oscillator (DCO) configured to receive a coarse digital control input and a fine digital control input, the first digital control input threshold being a fine digital control input.

17. A vehicle comprising the frequency modulated continuous wave (FMCW) radar device of claim 9.

18. A frequency calibration method for a phase-locked loop (PLL) comprising a multi-band oscillator, the method comprising:

providing a look-up table in a memory of the PLL to store control input for the oscillator;

acquiring a frequency controlled word (FCW) for the PLL corresponding to a frequency generated by the oscillator in response to a first control input threshold on a first band of the oscillator; and

generating a frequency corresponding to said FCW on a second band of the oscillator adjacent to said first band; and

identifying a second control input causing the oscillator to generate said frequency corresponding to said FCW and storing said second control input in said memory.

19. The method of claim 18, further comprising connecting an input of the PLL with an output of a filter of the PLL in order to acquire said FCW.

20. The method of claim 18, wherein the oscillator is configured to receive a coarse control input and a fine control input, the first control input threshold being a fine control input.

21. The method of claim 18, further comprising prior to said acquiring of the FCW, setting the control input to said first control input threshold.

22. The method of claim 18, wherein the acquiring, generating, identifying and storing are performed for each band of the oscillator successively.

23. The method of claim 18, further comprising for each band of the oscillator storing in said look-up table a further control input generating said FCW on another adjacent band of the oscillator.

24. The method of claim 18, wherein the PLL is a digital PLL, the oscillator is a Digitally Controlled Oscillator (DCO) and the method comprises receiving a coarse digital control input and a fine digital control input, the first digital control input threshold being a fine digital control input.