DISPLAY PANEL AND THIN FILM TRANSISTOR ARRAY SUBSTRATE

• US 20170017129A1
• Filed: 07/31/2015
• Published: 01/19/2017
• Est. Priority Date: 07/16/2015
• Status: Abandoned Application

• Current Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Original Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Inventors: YI, Shijuan, ZHAO, Mang, TIAN, Yong
• Application Number:
  US14/777,984
• Publication Number:
  US 20170017129A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136259 Repairing; Defects
• CPC Class Codes: G02F 1/136263 Line defects
• CPC Class Codes: G02F 1/13629 Multilayer wirings

Abstract

A display panel and thin film transistor array substrate are provided. The thin film transistor array substrate includes an active area and a peripheral region. The thin film transistor array substrate further includes a base substrate, a light shield metal layer, a first insulating layer, a semiconductor layer, a second insulating layer, a first signal line layer, a second signal line layer, a third signal line layer, a third insulating layer, a fourth insulating layer, a common line layer, a fifth insulating layer, and a pixel electrode layer. The present invention prevents display failure problems caused by the signal line being disconnected.

Claims

1. A display panel, comprising:

a color filter substrate;

a liquid crystal layer; and

a thin film transistor array substrate, comprising;

a base substrate;

a light shield metal layer, disposed on the base substrate;

a first insulating layer;

a semiconductor layer, disposed on the first insulating layer;

a second insulating layer, disposed on the first insulating layer and the semiconductor layer;

a first signal line layer, disposed on the second insulating layer;

a third insulating layer, disposed on the second insulating layer and the first signal line layer;

a second signal line layer, disposed on the third insulating layer, and connected with the semiconductor layer via a first through hole;

a fourth insulating layer, disposed on the third insulating layer and the second signal line layer;

a common line layer disposed on the fourth insulating layer;

a third signal line layer;

a fifth insulating layer disposed on the third signal line layer;

a pixel electrode layer disposed on the fifth insulating layer;

the light shield metal layer being connected with the second signal line layer via a connecting member;

the light shield metal layer being adapted for shielding a back channel of an N-channel metal oxide semiconductor transistor and for reducing current leakage of N-channel metal oxide semiconductor devices;

the light shield metal layer being formed of the same metal material as the second signal line layer.

2. The display panel according to claim 1, wherein the connecting member is disposed in a through hole;

the through hole passes through the first insulating layer, the second insulating layer and the third insulating layer.

3. The display panel according to claim 1, wherein a second signal line of the second signal line layer comprises:

at least one first section;

at least one second section; and

a shading line of the light shield metal layer comprises;

at least one third section;

at least one fourth section; and

the connecting member comprises;

at least one first sub-connecting member; and

at least one second sub-connecting member;

wherein the first section connected with the third section via the first sub-connecting member, the second section connected with the fourth section via the second sub-connecting member.

4. The display panel according to claim 1, wherein an end of the connecting member comprises a bending portion which is connected with the light shield metal layer and/or the second signal line layer.

5. A display panel, comprising:

a color filter substrate;

a liquid crystal layer; and

a thin film transistor array substrate, comprising;

a base substrate;

a light shield metal layer, disposed on the base substrate;

a first insulating layer;

a semiconductor layer, disposed on the first insulating layer;

a second insulating layer, disposed on the first insulating layer and the semiconductor layer;

a first signal line layer, disposed on the second insulating layer;

a third insulating layer, disposed on the second insulating layer and the first signal line layer;

a second signal line layer disposed on the third insulating layer, and connected with the semiconductor layer via a first through hole;

a fourth insulating layer disposed on the third insulating layer and the second signal line layer;

a common line layer disposed on the fourth insulating layer;

a third signal line layer;

a fifth insulating layer disposed on the third signal line layer; and

a pixel electrode layer disposed on the fifth insulating layer.

6. The display panel according to claim 5, wherein the light shield metal layer is connected with the second signal line layer via a connecting member.

7. The display panel according to claim 6, wherein the connecting member is disposed in a through hole;

the through hole passes through the first insulating layer, the second insulating layer and the third insulating layer.

8. The display panel according to claim 7, wherein the through hole is formed by etching with a photomask the first insulating layer, the second insulating layer and the third insulating layer.

9. The display panel according to claim 6, wherein a second signal line of the second signal line layer comprises:

at least one first section;

at least one second section; and

a shading line of the light shield metal layer comprises;

at least one third section;

at least one fourth section; and

the connecting member comprises;

at least one first sub-connecting member; and

at least one second sub-connecting member;

wherein the first section connected with the third section via the first sub-connecting member, the second section connected with the fourth section via the second sub-connecting member.

10. The display panel according to claim 9, wherein the second signal line of the second signal line layer and the shading line of the light shield metal layer are connected in parallel, and a connection point is disposed at a predetermined distance from the second signal line and the second signal line.

11. The display panel according to claim 6, wherein an end of the connecting member comprises a bending portion which is connected with the light shield metal layer and/or the second signal line layer.

12. The display panel according to claim 11, wherein the connecting member comprises a first end and a second end;

the first end is connected with the light shield metal layer, the first end includes a first bending portion which extends toward a direction away from the connecting member;

the second end is connected with the second signal line layer, the second end includes a second bending portion which extends toward a direction away from the connecting member.

13. A thin film transistor array substrate, comprising:

a base substrate;

a light shield metal layer disposed on the base substrate;

a first insulating layer;

a semiconductor layer, disposed on the first insulating layer;

a second insulating layer disposed on the first insulating layer and the semiconductor layer;

a first signal line layer disposed on the second insulating layer;

a third insulating layer disposed on the second insulating layer and the first signal line layer;

a second signal line layer disposed on the third insulating layer, and connected with the semiconductor layer via a first through hole;

a fourth insulating layer disposed on the third insulating layer and the second signal line layer;

a common line layer disposed on the fourth insulating layer;

a third signal line layer;

a fifth insulating layer disposed on the third signal line layer; and

a pixel electrode layer disposed on the fifth insulating layer.

14. The thin film transistor array substrate according to claim 13, wherein the light shield metal layer is connected with the second signal line layer via a connecting member.

15. The thin film transistor array substrate according to claim 14, wherein the connecting member is disposed in a through hole;

the through hole passes through the first insulating layer, the second insulating layer and the third insulating layer.

16. The thin film transistor array substrate according to claim 15, wherein the through hole is formed by etching with a photomask the first insulating layer, the second insulating layer and the third insulating layer.

17. The thin film transistor array substrate according to claim 14, wherein a second signal line of the second signal line layer comprises:

at least one first section;

at least one second section; and

a shading line of the light shield metal layer comprises;

at least one third section;

at least one fourth section; and

the connecting member comprises;

at least one first sub-connecting member; and

at least one second sub-connecting member;

wherein the first section connected with the third section via the first sub-connecting member, the second section connected with the fourth section via the second sub-connecting member.

18. The thin film transistor array substrate according to claim 17, wherein the second signal line of the second signal line layer and the shading line of the light shield metal layer are connected in parallel, and a connection point is disposed at a predetermined distance from the second signal line and the second signal line.

19. The thin film transistor array substrate according to claim 14, wherein an end of the connecting member comprises a bending portion which is connected with the light shield metal layer and/or the second signal line layer.

20. The thin film transistor array substrate according to claim 19, wherein the connecting member comprises a first end and a second end;

the first end is connected with the light shield metal layer, the first end includes a first bending portion which extends toward a direction away from the connecting member;

the second end is connected with the second signal line layer, the second end includes a second bending portion which extends toward a direction away from the connecting member.