FAILURE ESTIMATION APPARATUS AND FAILURE ESTIMATION METHOD

• US 20170023634A1
• Filed: 05/31/2016
• Published: 01/26/2017
• Est. Priority Date: 07/22/2015
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: MIMURA, Takeo, OONO, Tomohiro, TAKEHARA, Yuji
• Granted Patent: US 10,365,320 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01R 1/0458 related to environmental aspects, e.g. temperature
• CPC Class Codes: G01R 1/06777 High voltage probes
• CPC Class Codes: G01R 31/2608 for testing bipolar transistors
• CPC Class Codes: G01R 31/2642 Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
• CPC Class Codes: G01R 31/2817 Environmental-, stress-, or burn-in tests of IC's G01R31/2855; of individual semiconductors G01R31/2642; of other circuits G01R31/2849
• CPC Class Codes: G01R 31/2874 related to temperature
• CPC Class Codes: G01R 31/2875 related to heating

Abstract

There is a need to improve estimation accuracy of a failure estimation method or its failure estimation apparatus that performs failure estimation on a targeted instrument based on history information about several instruments mounted with the same type of semiconductor device as an instrument targeted at failure estimation. A failure estimation apparatus that includes a history information database storing history information about a plurality of instruments mounted with the same type of semiconductor device and performs failure estimation on a targeted instrument mounted with a semiconductor device whose type equals the type, wherein the history information contains operation information and failure information; wherein the operation information indicates a chronological operating state of the semiconductor device mounted on the instruments; wherein the failure information indicates a failure cause of a failed instrument; and wherein the operating state is categorized into a plurality of classifications.

Claims

1. A failure estimation apparatus that includes a history information database storing history information about a plurality of instruments mounted with the same type of semiconductor device and performs failure estimation on a targeted instrument mounted with a semiconductor device whose type equals the type,

wherein the history information contains operation information and failure information;

wherein the operation information indicates a chronological operating state of the semiconductor device mounted on the instruments;

wherein the failure information indicates a failure cause of a failed instrument;

wherein the operating state is categorized into a plurality of classifications;

wherein the failure estimation apparatus stores one of a program and a formula to implement a life estimation algorithm corresponding to each of the classifications and comprises;

a history information acquisition portion that acquires most recent history information about the targeted instrument;

an operating state analysis portion that specifies classification corresponding to an operating state of a semiconductor device mounted on the targeted instrument based on operation information contained in acquired history information;

a life estimation algorithm learning portion that updates a life estimation algorithm corresponding to a specified classification based on acquired history information when determining that the semiconductor device fails based on failure information contained in acquired history information;

a life estimation portion that performs life estimation using a life estimation algorithm corresponding to a specified classification when determining that no failure occurs based on failure information contained in acquired history information; and

a life estimation result notification portion that notifies a result of the life estimation.

2. The failure estimation apparatus according to claim 1,

wherein the instruments include different types of instruments and a criterion for the classification is applicable irrespective of instrument type differences.

3. The failure estimation apparatus according to claim 2,

wherein the operating state analysis portion specifies the classification based on a criterion using magnitude of a stress applied to the semiconductor device.

4. The failure estimation apparatus according to claim 3,

wherein the stress corresponds to a temperature difference between peak temperature and next peak temperature in temperature change transition and a criterion for the classification is specified in a temperature range in which the temperature difference most frequently occurs during a specified period in terms of occurrence frequency distribution.

5. The failure estimation apparatus according to claim 1,

wherein the life estimation algorithm is based on a life estimation curve specified by a life estimation coefficient and computes a life estimation value by adding the life estimation coefficient as a weight to operation information representing a chronological operating state of the semiconductor device;

and

wherein, when determining a failure of the targeted instrument conforms to a failure of the semiconductor device, the life estimation algorithm learning portion computes a life estimation value for the targeted instrument from the life estimation coefficient and operation information indicating a chronological operating state of the semiconductor device in the past up to failure occurrence of the targeted instrument, computes an estimation error using time information indicating an actual failure occurrence of the targeted instrument, and updates the life estimation coefficient so as to decrease the estimation error.

6. The failure estimation apparatus according to claim 5,

wherein the life estimation algorithm learning portion does not update the life estimation coefficient when the estimation error is outside a specified allowable range.

7. The failure estimation apparatus according to claim 6,

wherein, when determining a failure of the targeted instrument conforms to a failure of the semiconductor device, the life estimation algorithm learning portion computes a life estimation value with respect to each of a plurality of other already failed instruments belonging to the same classification as the targeted instrument from the life estimation coefficient and chronological operation information up to failure occurrence of the other instruments, computes an estimation error using time information indicating an actual failure occurrence of the other instruments, and finds the allowable range based on distribution of a plurality of estimation errors computed for each of the other instruments.

8. The failure estimation apparatus according to claim 7,

wherein the life estimation algorithm learning portion reviews a criterion for the classification when distribution of a plurality of estimation errors computed for each of the other instruments exceeds specified magnitude.

9. The failure estimation apparatus according to claim 1, further comprising:

an interface to couple with a network,

wherein the failure estimation apparatus uses the interface to acquire the history information via the network and notify a result of the life estimation.

10. The failure estimation apparatus according to claim 9, wherein the failure estimation apparatus uses the interface to acquire the history information from a user server coupled to the network and notify the user server of a result of the life estimation.

11. A failure estimation method that is based on history information about a plurality of instruments mounted with the same type of semiconductor device and performs failure estimation on a targeted instrument mounted with a semiconductor device whose type equals the type, the method being implemented by computer software,

wherein the history information contains operation information and failure information;

wherein the operation information indicates a chronological operating state of the semiconductor device mounted on the instruments;

wherein the failure information indicates a failure cause of a failed instrument;

wherein the operating state is categorized into a plurality of classifications;

wherein the failure estimation method comprising the steps of;

storing one of a program and a formula to implement a life estimation algorithm corresponding to each of the classifications;

acquiring most recent history information about the targeted instrument;

specifying a classification corresponding to an operating state of the semiconductor device based on operation information contained in acquired history information;

updating a life estimation algorithm corresponding to a specified classification based on acquired history information when determining that the semiconductor device fails based on failure information contained in acquired history information; and

performing life estimation using a life estimation algorithm corresponding to a specified classification when determining that no failure occurs based on failure information contained in acquired history information.

12. The failure estimation method according to claim 11,

wherein the instruments include different types of instruments and a criterion for the classification is applicable irrespective of instrument type differences.

13. The failure estimation method according to claim 12,

wherein the classifications are specified based on a criterion using magnitude of a stress applied to the semiconductor device.

14. The failure estimation method according to claim 13,

wherein the stress corresponds to a temperature difference between peak temperature and next peak temperature in temperature change transition and a criterion for the classification is specified in a temperature range in which the temperature difference most frequently occurs during a specified period in terms of occurrence frequency distribution.

15. The failure estimation method according to claim 11,

wherein the life estimation algorithm is based on a life estimation curve specified by a life estimation coefficient and computes a life estimation value by adding the life estimation coefficient as a weight to operation information representing a chronological operating state of the semiconductor device;

and

wherein, when determining a failure of the targeted instrument conforms to a failure of the semiconductor device, the failure estimation method computes a life estimation value for the targeted instrument from the life estimation coefficient and operation information indicating a chronological operating state of the semiconductor device in the past up to failure occurrence of the targeted instrument,

computes an estimation error using time information indicating an actual failure occurrence of the targeted instrument, and

updates the life estimation coefficient so as to decrease the estimation error.

16. The failure estimation method according to claim 15,

wherein the failure estimation method does not update the life estimation coefficient when the estimation error is outside a specified allowable range.

17. The failure estimation method according to claim 16,

wherein, when determining a failure of the targeted instrument conforms to a failure of the semiconductor device, the failure estimation method computes a life estimation value with respect to each of a plurality of other already failed instruments belonging to the same classification as the targeted instrument from the life estimation coefficient and chronological operation information up to failure occurrence of the other instruments, computes an estimation error using time information indicating an actual failure occurrence of the other instruments, and

finds the allowable range based on distribution of a plurality of estimation errors computed for each of the other instruments.

18. The failure estimation method according to claim 17,

wherein the failure estimation method reviews a criterion for the classification when distribution of a plurality of estimation errors computed for each of the other instruments exceeds specified magnitude.