INTERRUPT MANAGEMENT SYSTEM FOR DEFERRING LOW PRIORITY INTERRUPTS IN REAL-TIME SYSTEM
First Claim
1. An interrupt management system connected to an interrupt controller for managing a plurality of interrupts, the interrupt management system comprising:
- a timer; and
an interrupt management sub-system, connected to the timer, wherein the interrupt management sub-system is configured for;
receiving the plurality of interrupts,determining a first interrupt of the plurality of interrupts to be a real-time interrupt,determining a second interrupt of the plurality of interrupts to be a non-real-time interrupt,determining the second interrupt to be at least one of a maskable interrupt and a non-maskable interrupt,initializing the timer for a predetermined time period based on the first interrupt,transmitting the first interrupt to the interrupt controller,queuing the second interrupt during the predetermined time period when the second interrupt is a maskable interrupt, andtransmitting the second interrupt to the interrupt controller when the second interrupt is a non-maskable interrupt.
5 Assignments
0 Petitions
Accused Products
Abstract
An interrupt management system for managing multiple interrupts includes a timer and an interrupt management sub-system. The interrupt management sub-system receives first and second interrupts, determines the first interrupt to be a real-time interrupt and the second interrupt to be a non-real-time interrupt, initializes the timer for a predetermined time period on reception of the first interrupt, and determines whether the second interrupt is either a maskable or non-maskable interrupt. The interrupt management sub-system transmits the first interrupt to an interrupt controller, en-queues the second interrupt during the predetermined time period, and transmits the second interrupt to the interrupt controller after the predetermined time period when the second interrupt is a maskable interrupt. The interrupt management sub-system transmits the second interrupt to the interrupt controller during the predetermined time period when the second interrupt is a non-maskable interrupt.
-
Citations
15 Claims
-
1. An interrupt management system connected to an interrupt controller for managing a plurality of interrupts, the interrupt management system comprising:
-
a timer; and an interrupt management sub-system, connected to the timer, wherein the interrupt management sub-system is configured for; receiving the plurality of interrupts, determining a first interrupt of the plurality of interrupts to be a real-time interrupt, determining a second interrupt of the plurality of interrupts to be a non-real-time interrupt, determining the second interrupt to be at least one of a maskable interrupt and a non-maskable interrupt, initializing the timer for a predetermined time period based on the first interrupt, transmitting the first interrupt to the interrupt controller, queuing the second interrupt during the predetermined time period when the second interrupt is a maskable interrupt, and transmitting the second interrupt to the interrupt controller when the second interrupt is a non-maskable interrupt. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A system for managing a plurality of interrupts, wherein the plurality of interrupts includes first and second interrupts, the system comprising:
-
a timer for receiving a first interrupt signal corresponding to the first interrupt and generating a timer window active signal after a predetermined time period; a first interrupt status register for storing first and second status values, and providing first and second status signals, respectively, wherein a first logic state of the first status signal indicates that the first interrupt is a maskable interrupt and a second logic state of the first status signal indicates that the first interrupt is a non-maskable interrupt, a first logic state of the second status signal indicates that the second interrupt is a maskable interrupt and a second logic state of the second status signal indicates that the second interrupt is a non-maskable interrupt; a first logic gate having a first input terminal connected to the timer for receiving the timer window active signal, a second input terminal connected to the first interrupt status register for receiving the first status signal, a third input terminal for receiving a timer window abort signal, and an output terminal for generating a first interrupt enable signal; a second logic gate having a first input terminal connected to the timer for receiving the timer window active signal, a second input terminal connected to the first interrupt status register for receiving the second status signal, a third input terminal for receiving the timer window abort signal, and an output terminal for generating a second interrupt enable signal; a third logic gate having a first input terminal for receiving the first interrupt signal, a second input terminal connected to the output terminal of the first logic gate for receiving the first interrupt enable signal, and an output terminal for generating a first transmission signal; a fourth logic gate having a first input terminal for receiving a second interrupt signal corresponding to the second interrupt, a second input terminal connected to the output terminal of the second logic gate for receiving the second interrupt enable signal, and an output terminal for generating a second transmission signal; and an interrupt controller connected to the third and fourth logic gates for receiving the first and second transmission signals, respectively, and generating first and second interrupt transmission signals, respectively. - View Dependent Claims (10, 11, 12, 13)
-
-
14. In a computing system, a method for managing a plurality of interrupts, the method comprising:
-
receiving the plurality of interrupts; determining a first interrupt of the plurality of interrupts to be a real-time interrupt; determining a second interrupt of the plurality of interrupts to be a non-real-time interrupt; determining the second interrupt to be one of a maskable interrupt and a non-maskable interrupt; initializing a timer for a predetermined time period based on the first interrupt; transmitting the first interrupt to an interrupt controller; queuing the second interrupt during the predetermined time period when the second interrupt is a maskable interrupt; and transmitting the second interrupt to the interrupt controller when the second interrupt is a non-maskable interrupt. - View Dependent Claims (15)
-
Specification