Three-Dimensional Mask-Programmed Read-Only Memory With Reserved Space

• US 20170025389A1
• Filed: 10/03/2016
• Published: 01/26/2017
• Est. Priority Date: 01/11/2007
• Status: Abandoned Application

• Current Assignee: ChengDu HaiCun IP Technology LLC
• Original Assignee: ChengDu HaiCun IP Technology LLC
• Inventors: ZHANG, Guobiao
• Application Number:
  US15/284,534
• Publication Number:
  US 20170025389A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G11C 29/822 for read only memories
• CPC Class Codes: G11C 5/025 Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device geometrical lay-out of the components in integrated circuits, H01L27/0207
• CPC Class Codes: G11C 7/12 Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06548 Conductive via connections through the substrate, container, or encapsulation
• CPC Class Codes: H01L 2225/06568 the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 2225/06572 Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H10B 20/25 One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
• CPC Class Codes: H10B 20/60 Peripheral circuit regions

Abstract

The present invention discloses a 3D-MPROM with reserved level (3D-MPROM_RL). Versions of the 3D-MPROM_RL, including an original 3D-MPROM_RL and at least an updated 3D-MPROM_RL, collectively form a 3D-MPROM_RL family. Within a 3D-MPROM_RL family, 3D-MPROM_RL'"'"'s of different versions are same except for at least a reserved level, which is absent in the original 3D-MPROM_RL but present in the updated 3D-MPROM_RL.

Claims

1. A three-dimensional mask-programmed read-only memory with reserved level (3D-MPROM_RL) family, comprising:

a first 3D-MPROM die comprising a first substrate and M memory levels vertically stacked above said first substrate;

a second 3D-MPROM die comprising a second substrate and N memory levels vertically stacked above said second substrate;

wherein M, N are positive integers and M<

N; and

, said first and second 3D-MPROM dice are same except for at least a reserved memory level, wherein said reserved memory level is absent in said first 3D-MPROM die but present in said second 3D-MPROM die.

2. The 3D-MPROM_RL family according to claim 1, wherein said first and second 3D-MPROM dice comprise same peripheral circuits.

3. The 3D-MPROM_RL family according to claim 2, wherein said first 3D-MPROM die comprises the peripheral circuits for said N memory levels.

4. The 3D-MPROM_RL family according to claim 2, wherein said second 3D-MPROM die comprises the peripheral circuits for said N memory levels.

5. The 3D-MPROM_RL family according to claim 1, wherein N−

M memory levels are reserved memory levels.

6. The 3D-MPROM_RL family according to claim 1, wherein the contents stored in said first 3D-MPROM die are also stored in said second 3D-MPROM die.

7. The 3D-MPROM_RL family according to claim 6, wherein first M memory levels of said second 3D-MPROM die store the same contents as said M memory levels of said first 3D-MPROM die.

8. The 3D-MPROM_RL family according to claim 7, wherein first M memory levels of said second 3D-MPROM die are same as said M memory levels of said first 3D-MPROM die.

9. The 3D-MPROM_RL family according to claim 1, wherein said M memory levels store the original contents.

10. The 3D-MPROM_RL family according to claim 1, wherein said N−

M memory levels store the new content.

11. A three-dimensional mask-programmed read-only memory with reserved level (3D-MPROM_RL) family, comprising:

a first 3D-MPROM die comprising a first substrate and M memory levels vertically stacked above said first substrate;

a second 3D-MPROM die comprising a second substrate and N memory levels vertically stacked above said second substrate;

wherein M, N are positive integers and M<

N;

the contents stored in said first 3D-MPROM die are also stored in said second 3D-MPROM die; and

, said first and second 3D-MPROM dice comprise same peripheral circuits.

12. The 3D-MPROM_RL family according to claim 11, wherein said first 3D-MPROM die comprises the peripheral circuits for said N memory levels.

13. The 3D-MPROM_RL family according to claim 11, wherein said second 3D-MPROM die comprises the peripheral circuits for said N memory levels.

14. The 3D-MPROM_RL family according to claim 11, wherein N−

M memory levels are reserved memory levels.

15. The 3D-MPROM_RL family according to claim 14, wherein said first and second 3D-MPROM dice are same except for said reserved memory levels.

16. The 3D-MPROM_RL family according to claim 15, wherein said reserved memory levels are absent in said first 3D-MPROM die but present in said second 3D-MPROM die.

17. The 3D-MPROM_RL family according to claim 11, wherein first M memory levels of said second 3D-MPROM die store the same contents as said M memory levels of said first 3D-MPROM die.

18. The 3D-MPROM_RL family according to claim 17, wherein first M memory levels of said second 3D-MPROM die are same as said M memory levels of said first 3D-MPROM die.

19. The 3D-MPROM_RL family according to claim 11, wherein said M memory levels store the original contents.

20. The 3D-MPROM_RL family according to claim 11, wherein said N−

M memory levels store the new content.