SCHEME FOR DETERMINING DATA OBJECT USAGE IN A MEMORY REGION

• US 20170031812A1
• Filed: 07/27/2015
• Published: 02/02/2017
• Est. Priority Date: 07/27/2015
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: FRAZIER, Giles R., GSCHWIND, Michael Karl, MANTON, Younes, TAYLOR, Karl M., THOMPTO, Brian W.
• Granted Patent: US 10,083,113 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0253 Garbage collection, i.e. reclamation of unreferenced memory
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement
• CPC Class Codes: G06F 2212/702 Conservative garbage collection
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/0652 Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 9/45504 Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators

Abstract

Method and apparatus for managing memory is disclosed herein. In one embodiment, the method includes specifying a first load-monitored region within a memory, configuring a performance monitor to count object pointer accessed events associated with the first load-monitored region, executing a CPU instruction to load a pointer that points to a first location in the memory, responsive to determining that the first location is within the first load-monitored region, triggering an object pointer accessed event, updating a count of object pointer accessed events in the performance monitor, and performing garbage collection on the first load-monitored region based on the count of object pointer accessed events.

Claims

1-7. -7. (canceled)

8. A system, comprising:

a processor, comprising;

a load-monitored region register; and

a memory storing program code, which, when executed on the processor, performs an operation for managing memory, the operation comprising;

specifying a load-monitored region within a memory by loading the specified load-monitored region into the load-monitored region register that is initialized to designate an area of memory to be evaluated;

configuring a performance monitor to count object pointer accessed events occurring associated with the load-monitored region;

executing a CPU instruction to load a pointer to a first region of memory;

responsive to determining that the first region is within the load-monitored region, triggering an object pointer accessed event;

updating a count of object pointer accessed events in the performance monitor; and

performing garbage collection on the load-monitored region based on the count of object pointer accessed events.

9. The system of claim 8, comprising:

loading a section of the specified load-monitored region into a load-monitored section enable register that enables a desired section in the load-monitored region.

10. The system of claim 8, further comprising:

initializing the performance monitor to a desired value;

initializing a timeout to occur after a specified period of time; and

determining a rate of object access based on the count after the timeout occurs.

11. The system of claim 8, wherein the CPU instruction is a load-monitored instruction loads the pointer that points to the first region in memory.

12. The system of claim 8, further comprising:

specifying a second load-monitored region within a memory; and

performing garbage collection of the first load-monitored region before performing garbage collection on the second load-monitored region, wherein the count of object pointer accessed events in the first load-monitored region exceeds a count of object pointer accessed events in the second load-monitored region.

13. The system of claim 8, wherein the memory is a Java heap.

14. A computer readable storage medium having stored thereon instructions that when executed by a processor causes a processor to perform an operation for managing memory, comprising:

specifying a load-monitored region within a memory;

configuring a performance monitor to count object pointer accessed events occurring associated with the load-monitored region;

executing a CPU instruction to load a pointer to a first region of memory;

responsive to determining that the first region is within the load-monitored region, triggering an object pointer accessed event;

updating a count of object pointer accessed events in the performance monitor; and

performing garbage collection on the load-monitored region based on the count of object pointer accessed events.

15. The computer readable storage medium of claim 14, further comprising:

loading the specified load-monitored region into a load-monitored region register that is initialized to designate the area of memory currently being evaluated.

16. The computer readable storage medium of claim 15, comprising:

loading a section of the specified load-monitored region into a load-monitored section enable register that enables a section in the load-monitored region.

17. The computer readable storage medium of claim 14, further comprising:

initializing the performance monitor to a desired value;

initializing a timeout to occur after a specified period of time; and

determining a rate of object access based on the count after the timeout expires.

18. The computer readable storage medium of claim 14, wherein the CPU instruction is a load-monitored instruction loads the pointer that points to the first region in memory.

19. The computer readable storage medium of claim 14, further comprising:

specifying a second load-monitored region within a memory; and

performing garbage collection of the first load-monitored region before performing garbage collection on the second load-monitored region, wherein the count of object pointer accessed events in the first load-monitored region exceeds a count of object pointer accessed events in the second load-monitored region.

20. The computer readable storage medium of claim 14, wherein the memory is a Java heap.