SEMICONDUCTOR STRUCTURE WITH MULTILAYER III-V HETEROSTRUCTURES
First Claim
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1. A method, comprising:
- providing a starting semiconductor structure, the starting structure comprising a semiconductor substrate, an active region comprising a source region, a drain region and a channel region therebetween, and a gate structure above the channel region;
in each of the source and drain regions, forming a bottom barrier layer of a first compound semiconductor material;
forming a seed layer of a second compound semiconductor material over the bottom barrier layer, the seed layer having a first bandgap;
forming a top layer of a third compound semiconductor material above the seed layer, the top layer having a second bandgap that is narrow compared to the first bandgap, wherein each compound semiconductor material comprises at least one semiconductor material from each of Groups III and V of the Periodic Table of Elements; and
forming a compositionally graded layer of the second and third compound semiconductor materials between the seed layer and the top layer, the compositionally graded layer gradually transitioning from the second compound semiconductor material at a bottom portion thereof to the third compound semiconductor material at a top portion thereof.
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Abstract
The source/drain of a fully III-V semiconductor or Si-based transistor includes a bottom barrier layer that may be lattice matched to the channel, a lower layer of a wide bandgap III-V material and a top layer of a comparatively narrow bandgap III-V material, with a compositionally graded layer between the lower layer and top layer gradually transitioning from the wide bandgap material to the narrow bandgap material.
14 Citations
20 Claims
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1. A method, comprising:
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providing a starting semiconductor structure, the starting structure comprising a semiconductor substrate, an active region comprising a source region, a drain region and a channel region therebetween, and a gate structure above the channel region; in each of the source and drain regions, forming a bottom barrier layer of a first compound semiconductor material; forming a seed layer of a second compound semiconductor material over the bottom barrier layer, the seed layer having a first bandgap; forming a top layer of a third compound semiconductor material above the seed layer, the top layer having a second bandgap that is narrow compared to the first bandgap, wherein each compound semiconductor material comprises at least one semiconductor material from each of Groups III and V of the Periodic Table of Elements; and forming a compositionally graded layer of the second and third compound semiconductor materials between the seed layer and the top layer, the compositionally graded layer gradually transitioning from the second compound semiconductor material at a bottom portion thereof to the third compound semiconductor material at a top portion thereof. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A transistor, comprising:
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a channel region; and a source region and a drain region oppositely adjacent the channel region, each of the source region and the drain region comprising; a bottom barrier layer of a first compound semiconductor material; a seed layer of a second compound semiconductor material over the bottom barrier layer having a first bandgap; a top layer above the seed layer of a third compound semiconductor material having a second bandgap, the second bandgap being narrow in comparison to the first bandgap, wherein each compound semiconductor material comprises at least one semiconductor material from each of Groups III and V of the Periodic Table of Elements; and a compositionally graded layer between the seed layer and the top layer, the compositionally graded layer gradually transitioning from the second compound semiconductor material to the third compound semiconductor material. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification