Multilevel Inverter Device and Method

• US 20170054298A1
• Filed: 07/28/2016
• Published: 02/23/2017
• Est. Priority Date: 05/10/2012
• Status: Active Grant

• Current Assignee: Huawei Digital Power Technologies Company Limited (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Inventors: Fu, Dianbo, He, Bo, Li, Quan
• Granted Patent: US 9,806,529 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H02J 3/38 Arrangements for parallely feeding a single network by two or more generators, converters or transformers
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters
• CPC Class Codes: H02M 7/537 using semiconductor devices only, e.g. single switched pulse inverters
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: Y02E 10/56 Power conversion systems, e.g. maximum power point trackers

Abstract

An inverter comprises a first boost apparatus having an input coupled to a positive dc bus, a second boost apparatus having an input coupled to a negative dc bus, a first switch coupled to an input of an L-C filter and the first boost apparatus, a second switch coupled to the input of the L-C filter and the second boost apparatus, a third switch coupled between the positive dc bus and the first switch, wherein a common node of the first switch and the third switch is directly connected to an output of the first boost apparatus, a fourth switch coupled between the negative dc bus and the second switch, wherein a common node of the fourth switch and the second switch is directly connected to an output of the second boost apparatus and an isolation switch coupled between the input of the L-C filter and ground.

Claims

1. An inverter comprising:

a first boost apparatus having an input coupled to a positive dc bus;

a second boost apparatus having an input coupled to a negative dc bus;

a first switch coupled to an input of an L-C filter and the first boost apparatus;

a second switch coupled to the input of the L-C filter and the second boost apparatus;

a third switch coupled between the positive dc bus and the first switch, wherein a common node of the first switch and the third switch is directly connected to an output of the first boost apparatus;

a fourth switch coupled between the negative dc bus and the second switch, wherein a common node of the fourth switch and the second switch is directly connected to an output of the second boost apparatus; and

an isolation switch coupled between the input of the L-C filter and ground.

2. The inverter of claim 1, wherein:

the third switch is a first bidirectional switch; and

the fourth switch is a second bidirectional switch.

3. The inverter of claim 1, further comprising:

a first capacitor coupled between an output of the first boost apparatus and ground; and

a second capacitor coupled between an output of the second boost apparatus and ground.

4. The inverter of claim 1, wherein:

the isolation switch comprises a first transistor and a second transistor in a back-to-back connection.

5. The inverter of claim 1, wherein:

the first boost apparatus is a first boost dc/dc converter comprising a first input inductor, a first low side switch and a first blocking diode; and

the second boost apparatus is a second boost dc/dc converter comprising a second input inductor, a second low side switch and a second blocking diode.

6. The inverter of claim 1, wherein:

the first boost apparatus generates a first voltage higher than the positive dc bus; and

the second boost apparatus generates a second voltage lower than the negative dc bus.

7. The inverter of claim 6, wherein:

a five-level voltage is formed by the first voltage, the positive dc bus, ground, the negative dc bus and the second voltage.

8. The inverter of claim 1, further comprising:

a first power supply and a second power supply connected in series, wherein;

the positive dc bus is a first output terminal of the first power supply and a first output capacitor is connected between the output of the first boost apparatus and a second output terminal of the first power supply; and

the negative dc bus is a first output terminal of the second power supply and a second output capacitor is connected between the output of the second boost apparatus and a second output terminal of the second power supply.

9. The inverter of claim 8, wherein:

the second output terminal of the first power supply is directly connected to the second output terminal of the second power supply.

10. The inverter of claim 9, wherein:

the common node of the first power supply and the second power supply is connected to ground.

11. A device comprising:

a first dc power supply coupled between a positive dc bus and ground;

a second dc power supply coupled between a negative dc bus and ground;

a first boost apparatus having an input coupled to the positive dc bus;

a second boost apparatus having an input coupled to the negative dc bus;

a first switch directly connected between an output of the first boost apparatus and an input of an L-C filter;

a second switch directly connected between an output of the second boost apparatus and the input of an L-C filter;

a third switch coupled between the positive dc bus and the output of the first boost apparatus, wherein the third switch is a first bidirectional switch;

a fourth switch coupled between the negative dc bus and the output of the second boost apparatus, wherein the third switch is a second bidirectional switch; and

an isolation switch coupled between the input of the L-C filter and ground, wherein the isolation switch comprises two transistors back-to-back connected in series.

12. The device of claim 11, wherein:

the first boost apparatus comprises a first input inductor, a first low side switch and a first blocking diode; and

the second boost apparatus comprises a second input inductor, a second low side switch and a second blocking diode.

13. The device of claim 11, wherein:

the first switch, the second switch, the third switch and the fourth switch are insulated gate bipolar transistors.

14. A method comprising:

providing an inverter comprising;

a first boost apparatus having an input coupled to a positive dc bus;

a second boost apparatus having an input coupled to a negative dc bus;

a first switch coupled to an input of an L-C filter and the first boost apparatus;

a second switch coupled to the input of the L-C filter and the second boost apparatus;

a third switch coupled between the positive dc bus and the first switch, wherein an output of the first boost apparatus is directly connected to a common node of the first switch and the third switch;

a fourth switch coupled between the negative dc bus and the second switch, wherein an output of the second boost apparatus is directly connected to a common node of the second switch and the fourth switch; and

an isolation switch coupled between the input of the L-C filter and ground;

during a first time period of a half switching cycle, switching a voltage at the input of the L-C filter back and forth between the positive dc bus and ground;

during a second time period of the half switching cycle, switching the voltage at the input of the L-C filter back and forth between an output voltage of the first boost apparatus and ground; and

during a third time period of the half switching cycle, switching the voltage at the input of the L-C filter back and forth between the positive dc bus and ground, wherein the second time period is between the first time period and the third time period.

15. The method of claim 14, wherein:

during a transition time instant from the first time period to the second time period, the voltage at the input of the L-C filter increases from the positive dc bus to the output voltage of the first boost apparatus.

16. The method of claim 14, further comprising:

during a transition time instant from the second time period to the third time period, the voltage at the input of the L-C filter decreases from the output voltage of the first boost apparatus to the positive dc bus.

17. The method of claim 14, further comprising:

turning off the first boost apparatus when the inverter switches back and forth between ground and the positive dc bus; and

turning off the second boost apparatus when the inverter switches back and forth between ground and the negative dc bus.

18. The method of claim 14, further comprising:

during a mode transition from a boost mode to an input dc source mode, keeping the third switch off until a voltage across two terminals of an output capacitor of the first boost apparatus is discharged to a level approximately equal to the positive dc bus.

19. The method of claim 14, further comprising:

during a mode transition from a boost mode to an input dc source mode, keeping the fourth switch off until a voltage across two terminals of an output capacitor of the second boost apparatus is discharged to a level approximately equal to the negative dc bus.

20. The method of claim 14, further comprising:

during a boost mode, switching the voltage at the input of the L-C filter back and forth between an output voltage of the first boost apparatus and ground in at least two consecutive switching pulses, wherein the isolation switch functions as a freewheeling path between the input of the L-C filter and ground.