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INTEGRATED CIRCUIT WITH ELECTRICAL FUSE AND METHOD OF FORMING THE SAME

  • US 20170062335A1
  • Filed: 11/14/2016
  • Published: 03/02/2017
  • Est. Priority Date: 11/22/2011
  • Status: Abandoned Application
First Claim
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1. A method of forming an integrated circuit, the method comprising:

  • forming at least one transistor over a substrate, wherein forming the at least one transistor comprises;

    forming a gate dielectric structure over a substrate;

    forming a work-function metallic layer over the gate dielectric structure;

    forming a conductive layer over the work-function metallic layer; and

    forming a source/drain (S/D) region being disposed adjacent to each sidewall of the gate dielectric structure;

    forming a diffusion barrier layer between the gate dielectric structure and the work-function layer; and

    forming at least one electrical fuse over the substrate, wherein forming the at least one electrical fuse comprises;

    forming a first semiconductor layer over the substrate; and

    forming a first silicide layer on the first semiconductor layer, wherein the diffusion barrier layer is formed before the first silicide layer.

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