RADIO DIE PACKAGE WITH BACKSIDE CONDUCTIVE PLATE

• US 20170062357A1
• Filed: 03/19/2015
• Published: 03/02/2017
• Est. Priority Date: 03/19/2015
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: KAMGAING, Teleshpor, MEYER, Thorsten
• Granted Patent: US 10,453,804 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/485 Adaptation of interconnections, e.g. engineering charges, repair techniques
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 21/4882 Assembly of heatsink parts
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2223/6616 Vertical connections, e.g. vias
• CPC Class Codes: H01L 2223/6672 for integrated passive components, e.g. semiconductor device with passive components only integrated circuits with passive components only per se H01L27/01
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/02372 connecting to a via connection in the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/02379 Fan-out arrangement
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/13024 the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/24195 the item being a discrete passive component
• CPC Class Codes: H01L 2224/24245 the item being metallic
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/82047 by mechanical means, e.g. severing, pressing, stamping
• CPC Class Codes: H01L 2224/83191 : wherein the layer connectors are disposed only on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83193 : wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/92244 : the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 2225/06513 : Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06537 : Electromagnetic shielding
• CPC Class Codes: H01L 2225/06548 : Conductive via connections through the substrate, container, or encapsulation
• CPC Class Codes: H01L 2225/06555 : Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
• CPC Class Codes: H01L 2225/06582 : Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 2225/06589 : Thermal management, e.g. cooling
• CPC Class Codes: H01L 2225/1035 : the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 2225/1094 : Thermal management, e.g. cooling
• CPC Class Codes: H01L 23/36 : Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/373 : Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/5389 : the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 23/552 : Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/562 : Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 23/66 : High-frequency adaptations
• CPC Class Codes: H01L 24/02 : Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/19 : Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/1421 : RF devices
• CPC Class Codes: H01L 2924/1434 : Memory
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/19011 : including integrated passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H01Q 1/2283 : mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
• CPC Class Codes: H01Q 1/241 : used in mobile communications, e.g. GSM H01Q1/247, H01Q1/248 take precedence
• CPC Class Codes: H01Q 1/38 : formed by a conductive layer on an insulating support patch antennas H01Q9/0407; microstrip dipole antennas H01Q9/065; microstrip slot antennas H01Q13/106; transmission line microstrip antennas H01Q13/206; manufacturing reflecting surfaces using insulating material for supporting the reflecting surface H01Q15/142

Abstract

A package is described for a radio frequency die that has a backside conductive plate. One example includes a conductive plate, a semiconductor die having a front side and a back side, the back side being attached to the plate, a radio frequency component attached to the plate, a dielectric filled cavity in the plate adjacent to the radio frequency component, and a redistribution layer attached to the front side of the die for external connection.

Claims

1-25. -25. (canceled)

26. A semiconductor package comprising:

a conductive plate;

a semiconductor die having a front side and a back side, the back side being attached to the plate;

a radio frequency component attached to the plate;

a dielectric filled cavity in the plate adjacent to the radio frequency component; and

a redistribution layer attached to the front side of the die for external connection.

27. The package of claim 26, wherein the plate comprises copper, ceramic, or polymer.

28. The package of claim 26, wherein the dielectric comprises epoxy, polyimide, or liquid crystal polymer.

29. The package of claim 26, wherein the cavity extends through the plate from a side attached to the die to a side opposite the die.

30. The package of claim 26, wherein the radio frequency component is formed on the front side of the die.

31. The package of claim 30, wherein the die has a section containing radio frequency circuits including the radio frequency component.

32. The package of claim 31, wherein the radio frequency circuits comprise a radio frequency amplifier.

34. The package of claim 26, further comprising a dielectric over the die and the plate between the die and the redistribution layer.

35. The package of claim 26, further comprising;

a second die;

a second dielectric filled cavity in the plate spaced apart from the first die and a via bar within the second dielectric cavity;

a connection pad array on the via bar to connect to the second die on a side of the plate opposite the first die.

36. The package of claim 35, further comprising a plurality of vias to connect the via bar to the redistribution layer.

37. The package of claim 26, further comprising a passivation layer between the die and the plate.

33. The package of claim 46, further comprising a second die, the second die also being attached to the plate, and wherein the radio frequency component is formed on the second die.

38. A method comprising:

forming a cavity in a plate;

attaching a back side of a die to the plate, the die having an RF section and the die being attached so that the RF section is adjacent to the cavity;

covering a front side of the die with a dielectric;

forming a redistribution layer over the dielectric for external connection of the front side of the die.

39. The method of claim 38, further comprising filling the cavity with a dielectric before attaching the die.

40. The method of claim 38, further comprising attaching a second die to the plate and wherein covering the die with a dielectric comprises covering the first and the second the with the dielectric.

41. The method of claim 38, further comprising forming vias in the dielectric before forming the redistribution layers, the vias connecting connection pads of the die to the redistribution layer.

42. The method of claim 38, wherein forming a cavity comprises forming a cavity through the plate from one side closest to the die to the opposite side.

43. The method of claim 38, further comprising:

forming a second cavity through the plate and spaced apart from the die before attaching the die;

filling the second cavity with a dielectric;

forming vias through the dielectric of the second cavity;

connecting the second cavity vias on one side to the redistribution layer; and

connecting the second cavity vias on the opposite side to an additional die.

44. A computing device comprising:

a power supply;

an antenna; and

a package containing a conductive plate, a semiconductor die having a front side and a back side, the back side being attached to the plate, a radio frequency component attached to the plate and coupled to the antenna, a dielectric filled cavity in the plate adjacent to the radio frequency component, and a redistribution layer attached to the front side of the die for external connection to the antenna and the power supply.

45. The computing device of claim 44 wherein the die is a processor, the package further comprising;

a memory die;

a second dielectric filled cavity in the plate spaced apart from the processor and a via bar within the second dielectric cavity;

a connection pad array on the via bar to connect to the memory die on a side of the plate opposite the processor and to connect the memory die to the processor through the redistribution layer.