LIGHT EMITTING DIODE AND MANUFACTURE METHOD THEREOF

• US 20170062653A1
• Filed: 09/02/2016
• Published: 03/02/2017
• Est. Priority Date: 09/02/2015
• Status: Active Grant

• Current Assignee: Genesis Photonics Inc.
• Original Assignee: Genesis Photonics Inc.
• Inventors: Huang, Tsung-Syun, Huang, Jing-En, Kuo, Yu-Chen, Lan, Yan-Ting, Kang, Kai-Shun, Lu, Fei-Lung, Lai, Teng-Hsien, Huang, Yi-Ru
• Granted Patent: US 10,326,047 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/145 with a current-blocking structure
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/38 with a particular shape

Abstract

A light-emitting diode including a semiconductor epitaxial layer, a first electrode, and a second electrode is provided. The semiconductor epitaxial layer includes a first-type doped semiconductor layer, a second-type doped semiconductor layer, and a quantum well layer. A recessed portion is formed in the semiconductor epitaxial layer. The recessed portion separates the second-type doped semiconductor layer, the quantum well layer, and a portion of the first-type doped semiconductor layer and defines a first region and a second region on the semiconductor epitaxial layer. The first electrode is located in the first region and electrically connected to at least a portion of the first-type doped semiconductor layer and at least a portion of the second-type doped semiconductor layer. The second electrode is located in the second region and electrically connected to the second-type doped semiconductor layer.

Claims

1. A light-emitting diode (LED), comprising:

a semiconductor epitaxial layer comprising a first-type doped semiconductor layer, a second-type doped semiconductor layer, and a quantum well layer, wherein the quantum well layer is located between the first-type doped semiconductor layer and the second-type doped semiconductor layer, a recessed portion is formed in the semiconductor epitaxial layer, the recessed portion separates the second-type doped semiconductor layer, the quantum well layer, and a portion of the first-type doped semiconductor layer and exposes the first-type doped semiconductor layer, and defines a first region and a second region on the semiconductor epitaxial layer, wherein the first region and the second region respectively contain a portion of the second-type doped semiconductor layer, a portion of the quantum well layer, and a portion of the first-type doped semiconductor layer and are connected to each other via the first-type doped semiconductor layer;

a first electrode located in the first region and electrically connected to at least a portion of the first-type doped semiconductor layer and at least a portion of the second-type doped semiconductor layer; and

a second electrode located in the second region and electrically connected to the second-type doped semiconductor layer.

2. The LED of claim 1, wherein the first electrode further comprises a soldering portion and a branch portion extended from the soldering portion, the soldering portion is disposed on a portion of the second-type doped semiconductor layer, and the branch portion is disposed on a portion of the first-type doped semiconductor layer.

3. The LED of claim 2, wherein in the first region, an area of the soldering portion of the first electrode is less than an area of the second-type doped semiconductor layer.

4. The LED of claim 2, wherein the branch portion of the first electrode covers a portion of an upper surface of the second-type doped semiconductor layer, a side surface of the second-type doped semiconductor layer, a side surface of the quantum well layer, and an upper surface of a portion of the first-type doped semiconductor layer.

5. The LED of claim 1, further comprising:

a current-blocking layer disposed on the second-type doped semiconductor layer in the second region, wherein the current-blocking layer comprises a main body and an extending portion extended from the main body; and

a current-spreading layer disposed on the second-type doped semiconductor layer and the current-blocking layer.

6. The LED of claim 5, wherein the semiconductor epitaxial layer, the first electrode, the current-blocking layer, the current-spreading layer, and the second electrode are disposed at a same side of the substrate.

7. The LED of claim 5, wherein the second electrode is electrically connected to the second-type doped semiconductor layer via the current-spreading layer.

8. The LED of claim 5, wherein the current-blocking layer and the current-spreading layer further contain a first opening, and the first opening exposes a portion of the second-type doped semiconductor layer.

9. The LED of claim 1, wherein in the first region, a shape of a cross-section of the first-type doped semiconductor layer, the quantum well layer, and the second-type doped semiconductor layer is a trapezoid.

10. The LED of claim 1, further comprising an insulation layer covering a portion of the first-type doped semiconductor layer, the quantum well layer, and the second-type doped semiconductor layer.

11. The LED of claim 10, wherein the insulation layer respectively has a second opening, a third opening, and at least one fourth opening, the second opening is located in the second region and is connected to the first opening, the third opening is located in the first region and exposes a portion of the second-type doped semiconductor layer in the first region, and the at least one fourth opening is arranged along an extending direction of the branch portion of the first electrode.

12. The LED of claim 10, wherein the second electrode is disposed in the second opening and the first opening, the soldering portion of the first electrode is disposed in the third opening, and the branch portion of the first electrode covers a portion of the insulation layer and is extended into the at least one fourth opening.

13. The LED of claim 10, wherein a spacing is between the insulation layer and the second electrode.

14. A manufacturing method of an LED, comprising:

forming a semiconductor epitaxial layer on a substrate, wherein the semiconductor epitaxial layer comprises a first-type doped semiconductor layer, a quantum well layer, and a second-type doped semiconductor layer in order;

patterning the semiconductor epitaxial layer and defining a first region and a second region on the semiconductor epitaxial layer, wherein the first region and the second region respectively contain a portion of the second-type doped semiconductor layer, a portion of the quantum well layer, and a portion of the first-type doped semiconductor layer and are connected to each other via the first-type doped semiconductor layer;

forming a first electrode electrically connected to the first-type doped semiconductor layer and the second-type doped semiconductor layer in the first region; and

forming a second electrode electrically connected to the second-type doped semiconductor layer in the first region.

15. The manufacturing method of an LED of claim 14, wherein the first electrode comprises a soldering portion and a branch portion extended from the soldering portion, the soldering portion is formed on at least a portion of the second-type doped semiconductor layer, and the branch portion is formed at least on a portion of the first-type doped semiconductor layer.

16. The manufacturing method of an LED of claim 14, further comprising:

forming a current-blocking layer and a current-spreading layer stacked on the second-type doped semiconductor layer of the second region, wherein the current-spreading layer is electrically connected to the second electrode and the second-type doped semiconductor layer.

17. The manufacturing method of an LED of claim 16, further comprising:

forming a first opening in the current-blocking layer and the current-spreading layer, wherein the first opening exposes a portion of the second-type doped semiconductor layer.

18. The manufacturing method of an LED of claim 15, further comprising:

forming an insulation layer on the semiconductor epitaxial layer; and

forming a second opening, a third opening, and at least one fourth opening in the insulation layer, wherein the second electrode passes through the second opening and is electrically connected to the second-type doped semiconductor layer, the soldering portion of the first electrode is electrically connected to the second-type doped semiconductor layer via the third opening, and the branch portion of the first electrode is electrically connected to the first-type doped semiconductor layer via the fourth opening.

19. The manufacturing method of an LED of claim 15, further comprising:

forming a current-blocking layer and a current-spreading layer stacked on the second-type doped semiconductor layer of the second region, wherein the current-spreading layer is electrically connected to the second electrode and the second-type doped semiconductor layer.

20. The manufacturing method of an LED of claim 19, further comprising:

forming an insulation layer on the semiconductor epitaxial layer; and

forming a second opening, a third opening, and at least one fourth opening in the insulation layer, wherein the second electrode passes through the second opening and is electrically connected to the second-type doped semiconductor layer, the soldering portion of the first electrode is electrically connected to the second-type doped semiconductor layer via the third opening, and the branch portion of the first electrode is electrically connected to the first-type doped semiconductor layer via the fourth opening.