NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN REGION AND METHOD TO FABRICATE SAME
First Claim
1. A semiconductor device, comprising:
- a plurality of semiconductor fins disposed above a semiconductor substrate, each semiconductor fin having a sub-fin portion below a protruding portion, the sub-fin portion narrower than the protruding portion;
a solid state dopant source layer disposed above the semiconductor substrate, conformal with the sub-fin region but not the protruding portion of each of the plurality of semiconductor fins;
an isolation layer disposed above the solid state dopant source layer and between the sub-fin regions of the plurality of semiconductor fins;
a gate stack disposed above the isolation layer and conformal with the protruding portions of each of the plurality of semiconductor fins, the gate stack comprising a gate dielectric layer and gate electrode; and
source and drain regions disposed in the protruding portions of each of the plurality of semiconductor fins, on either side of the gate stack.
1 Assignment
0 Petitions
Accused Products
Abstract
Non-planar semiconductor devices having omega-fins with doped sub-fin regions and methods of fabricating non-planar semiconductor devices having omega-fins with doped sub-fin regions are described. For example, a semiconductor device includes a plurality of semiconductor fins disposed above a semiconductor substrate, each semiconductor fin having a sub-fin portion below a protruding portion, the sub-fin portion narrower than the protruding portion. A solid state dopant source layer is disposed above the semiconductor substrate, conformal with the sub-fin region but not the protruding portion of each of the plurality of semiconductor fins. An isolation layer is disposed above the solid state dopant source layer and between the sub-fin regions of the plurality of semiconductor fins. A gate stack is disposed above the isolation layer and conformal with the protruding portions of each of the plurality of semiconductor fins.
216 Citations
25 Claims
-
1. A semiconductor device, comprising:
-
a plurality of semiconductor fins disposed above a semiconductor substrate, each semiconductor fin having a sub-fin portion below a protruding portion, the sub-fin portion narrower than the protruding portion; a solid state dopant source layer disposed above the semiconductor substrate, conformal with the sub-fin region but not the protruding portion of each of the plurality of semiconductor fins; an isolation layer disposed above the solid state dopant source layer and between the sub-fin regions of the plurality of semiconductor fins; a gate stack disposed above the isolation layer and conformal with the protruding portions of each of the plurality of semiconductor fins, the gate stack comprising a gate dielectric layer and gate electrode; and source and drain regions disposed in the protruding portions of each of the plurality of semiconductor fins, on either side of the gate stack. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
-
-
13. A semiconductor device, comprising:
-
a plurality of semiconductor fins disposed above a semiconductor substrate, each semiconductor fin having a sub-fin portion below a protruding portion, the sub-fin portion narrower than the protruding portion; a dopant concentration interface between each protruding portion and corresponding sub-fin portion of each of the plurality of semiconductor fins; an isolation layer disposed between the sub-fin regions of the plurality of semiconductor fins; a gate stack disposed above the isolation layer and conformal with the protruding portions of each of the plurality of semiconductor fins, the gate stack comprising a gate dielectric layer and gate electrode; and source and drain regions disposed in the protruding portions of each of the plurality of semiconductor fins, on either side of the gate stack. - View Dependent Claims (14, 15, 16, 17, 18)
-
-
19. A method of fabricating a semiconductor device, the method comprising:
-
forming a plurality of semiconductor fins above a semiconductor substrate; forming a catalyst layer above the semiconductor substrate, conformal with the plurality of semiconductor fins; forming a mask above the catalyst layer; recessing the mask and the catalyst layer to approximately a same level below a top surface of the plurality of semiconductor fins, exposing protruding portions of each of the plurality of semiconductor fins above sub-fin regions of each of the plurality of semiconductor fins; oxidizing outer portions of the sub-fin regions of each of the plurality of semiconductor fins using the catalyst layer to catalytically oxidize the sub-fin regions; and removing oxide formed from the oxidizing to provide a plurality of omega-fins having sub-fin regions narrower than corresponding protruding proportions. - View Dependent Claims (20, 21, 22, 23, 24, 25)
-
Specification