SEMICONDUCTOR DEVICE WITH AN ANGLED SIDEWALL GATE STACK
First Claim
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1. A method of forming a semiconductor device, comprising:
- forming a silicon dummy layer;
etching the silicon dummy layer to define a first tapered sidewall and a second tapered sidewall;
forming a first spacer adjacent the first tapered sidewall of the silicon dummy layer and forming a second spacer adjacent the second tapered sidewall of the silicon dummy layer;
removing the silicon dummy layer to form an opening, wherein the opening is defined by a first tapered sidewall of the first spacer previously in contact with the first tapered sidewall of the silicon dummy layer and a first tapered sidewall of the second spacer previously in contact with the second tapered sidewall of the silicon dummy layer; and
forming a gate electrode in the opening.
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Abstract
A semiconductor device includes a metal gate stack. The metal gate stack includes a high-k gate dielectric and a metal gate electrode over the high-k gate dielectric. The metal gate electrode includes a first top surface and a second bottom surface substantially diametrically opposite the first top surface. The first top surface includes a first surface length and the second bottom surface includes a second surface length. The first surface length is larger than the second surface length. A method of forming a semiconductor device is provided.
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Citations
20 Claims
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1. A method of forming a semiconductor device, comprising:
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forming a silicon dummy layer; etching the silicon dummy layer to define a first tapered sidewall and a second tapered sidewall; forming a first spacer adjacent the first tapered sidewall of the silicon dummy layer and forming a second spacer adjacent the second tapered sidewall of the silicon dummy layer; removing the silicon dummy layer to form an opening, wherein the opening is defined by a first tapered sidewall of the first spacer previously in contact with the first tapered sidewall of the silicon dummy layer and a first tapered sidewall of the second spacer previously in contact with the second tapered sidewall of the silicon dummy layer; and forming a gate electrode in the opening. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method of forming a semiconductor device, comprising:
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forming a silicon dummy layer; etching the silicon dummy layer such that a width of the silicon dummy layer at a top surface of the silicon dummy layer is greater than a width of the silicon dummy layer at a bottom surface of the silicon dummy layer; forming a first spacer and a second spacer on opposing sides of the silicon dummy layer; removing the silicon dummy layer to form an opening, wherein a width of the opening between a top surface of the first spacer and a top surface of the second spacer is greater than a width of the opening between a bottom surface of the first spacer and a bottom surface of the second spacer; and forming a gate electrode in the opening. - View Dependent Claims (16, 17, 18, 19)
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20. A method of forming a semiconductor device, comprising:
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forming a silicon dummy layer; etching the silicon dummy layer, comprising; performing a first etch to define a first non-tapered sidewall of the silicon dummy layer and a second non-tapered sidewall of the silicon dummy layer; and performing a second etch to taper the first non-tapered sidewall of the silicon dummy layer to define a first tapered sidewall of the silicon dummy layer and to taper the second non-tapered sidewall of the silicon dummy layer to define a second tapered sidewall of the silicon dummy layer; forming a first spacer adjacent the first tapered sidewall of the silicon dummy layer and forming a second spacer adjacent the second tapered sidewall of the silicon dummy layer; removing the silicon dummy layer to form an opening; and forming a gate electrode in the opening.
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Specification