BATTERY RELIABILITY ODOMETER

• US 20170092996A1
• Filed: 09/26/2015
• Published: 03/30/2017
• Est. Priority Date: 09/26/2015
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: RODRIGUEZ, JORGE P., UAN-ZO-LI, ALEXANDER B., MATSUMURA, NAOKI, KEATES, ANDY, HERMERDING, JAMES G. II
• Granted Patent: US 10,468,730 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01M 10/48 Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569
• CPC Class Codes: H01M 2010/4278 Systems for data transfer from batteries, e.g. transfer of battery parameters to a controller, data transferred between battery controller and main controller
• CPC Class Codes: H02J 7/0048 Detection of remaining charge capacity or state of charge [SOC]
• CPC Class Codes: H02J 7/005 Detection of state of health [SOH]
• CPC Class Codes: H02J 7/007192 in response to temperature
• CPC Class Codes: H02J 7/007194 of the battery
• CPC Class Codes: H02J 7/04 Regulation of charging current or voltage
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

Various embodiments may be generally directed to techniques for using an observed battery stress history to manage operation of a computing system component in a high power performance mode when powered by a battery. Various embodiments include techniques for tracking stresses to a battery. Various embodiments include techniques for comparing the battery stress history to a degradation baseline for the battery. Various embodiments include techniques for developing a degradation baseline for a battery including, for example, a degradation baseline based on expected stress to a battery and/or a degradation baseline based on a battery reliability model. Various embodiments include techniques for determining a battery stress surplus or deficit. Various embodiments include techniques for managing operation of a performance enhancing mode or high power performance mode of a computing system component based on the determined battery stress surplus or deficit.

Claims

1. An apparatus, comprising:

a variable mode component with multiple operational modes, at least one of which is a higher power performance mode; and

logic, at least a portion of which is implemented in hardware, the logic comprising;

a battery monitor component to monitor a characteristic of a battery arranged to provide power to the variable mode component;

a stress tracking component to determine an accumulated amount of stress to the battery based on the battery characteristic; and

a controller component to compare the determined accumulated amount of stress to the battery with an expected amount of stress to the battery, and to regulate operation of the variable mode component in the higher power performance mode based on the comparison.

2. The apparatus of claim 1, the variable mode component to comprise a processor.

3. The apparatus of claim 2, the higher power performance mode to comprise an overclocking mode of the processor.

4. The apparatus of claim 1, the variable mode component to comprise a camera.

5. The apparatus of claim 4, the higher power performance mode to comprise a resolution mode of the camera.

6. The apparatus of claim 4, the higher power performance mode to comprise a flash mode of the camera.

7. The apparatus of claim 1, the variable mode component to comprise a display.

8. The apparatus of claim 7, the higher power performance mode to comprise a light intensity mode of the display.

9. The apparatus of claim 1, the higher power performance mode to demand more power from the battery than a baseline performance mode of the variable mode component.

10. The apparatus of claim 1, the controller to regulate the higher power performance mode based on a first restriction when the determined accumulated amount of stress is greater than the expected amount of stress and to regulate the higher power performance mode based on a second restriction when the determined accumulated amount of stress is less than the expected amount of stress.

11. The apparatus of claim 10, the first restriction to comprise prevention of the variable mode component from operation in the higher power performance mode.

12. The apparatus of claim 10, the second restriction to comprise adjustment of one of a power draw and a duration of the higher power performance mode.

13. The apparatus of claim 1, the battery characteristic to comprise one of a battery temperature increase correlated to a high energy discharge event, a battery temperature increase correlated to a fast charge event, an ambient temperature increase, and a number of charging-discharging cycles of the battery.

14. The apparatus of claim 13, the high energy discharge event to correspond to the higher energy performance mode of the variable mode component.

15. The apparatus of claim 1, the expected amount of stress to the battery to comprise an average amount of stress applied to the battery.

16. At least one non-transitory computer-readable storage medium comprising a set of instructions that, in response to being executed at computing device, cause the computing device to:

monitor a characteristic of a battery;

track an accumulated amount of stress to the battery based on the battery characteristic;

compare the accumulated amount of stress to the battery with an expected amount of stress to the battery; and

regulate operation of a higher power performance mode of a variable mode component powered by the battery based on the comparison.

17. The at least one non-transitory computer-readable storage medium of claim 16, comprising instructions that, in response to being executed at the computing device, cause the computing device to regulate an overclocking mode of a processor.

18. The at least one non-transitory computer-readable storage medium of claim 16, comprising instructions that, in response to being executed at the computing device, cause the computing device to regulate one of a resolution mode and a flash mode of a camera.

19. The at least one non-transitory computer-readable storage medium of claim 16, comprising instructions that, in response to being executed at the computing device, cause the computing device to regulate a light intensity mode of a display.

20. The at least one non-transitory computer-readable storage medium of claim 16, comprising instructions that, in response to being executed at the computing device, cause the computing device to regulate the higher power performance mode under a first restriction when the accumulated amount of stress is greater than the expected amount of stress and to regulate the higher power performance mode under a second restriction when the accumulated amount of stress is less than the expected amount of stress.

21. The at least one non-transitory computer-readable storage medium of claim 20, comprising instructions that, in response to being executed at the computing device, cause the computing device to generate the first restriction to comprise prevention of the variable mode component from operating in the higher power performance mode.

22. The at least one non-transitory computer-readable storage medium of claim 20, comprising instructions that, in response to being executed at the computing device, cause the computing device to generate the second restriction to comprise adjusting one of a power draw and a duration of the higher power performance mode.

23. The at least one non-transitory computer-readable storage medium of claim 16, comprising instructions that, in response to being executed at the computing device, cause the computing device to monitor one of a battery temperature increase correlated to a high energy discharge event, a battery temperature increase correlated to a fast charge event, an ambient temperature increase, and a number of charging-discharging cycles of the battery.

24. A method, comprising:

monitoring a characteristic of a battery;

tracking an accumulated amount of stress to the battery based on the battery characteristic;

comparing the accumulated amount of stress to the battery with an expected amount of stress to the battery; and

regulating operation of a higher power performance mode of a variable mode component powered by the battery based on a result of the comparison.

25. The method of claim 24, the regulating to comprise operating under a first restriction when the accumulated amount of stress is greater than the expected amount of stress and to comprise operating under a second restriction when the accumulated amount of stress is less than the expected amount of stress.