ENCAPSULATED MICROELECTROMECHANICAL STRUCTURE
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Accused Products
Abstract
After forming a microelectromechanical-system (MEMS) resonator within a silicon-on-insulator (SOI) wafer, a complementary metal oxide semiconductor (CMOS) cover wafer is bonded to the SOI wafer via one or more eutectic solder bonds that implement respective paths of electrical conductivity between the two wafers and hermetically seal the MEMS resonator within a chamber.
9 Citations
40 Claims
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1-20. -20. (canceled)
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21. A method of fabricating a microelectromechanical system (MEMS) device, the method comprising:
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forming a MEMS resonator within a semiconductor layer of a semiconductor-on-insulator (SOI) wafer; and bonding a complementary metal oxide semiconductor (CMOS) cover wafer to the SOI wafer via one or more eutectic solder bonds that (i) implement respective paths of electrical conductivity between the CMOS cover wafer and the SOI wafer, and (ii) hermetically seal the MEMS resonator within a chamber enclosed at least in part by the CMOS cover wafer and the substrate layer of the SOI wafer. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 30)
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29. The method of claim 29 wherein forming the MEMS resonator comprises forming a cavity in a region of the semiconductor layer prior to bonding the CMOS cover wafer to the SOI wafer so that, after bonding the CMOS cover wafer to the SOI wafer, the region of the semiconductor layer is separated from the CMOS cover wafer by a void.
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31. A microelectromechanical system (MEMS) device comprising:
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a semiconductor-on-insulator (SOI) substrate having (i) first and second semiconductor layers separated by an insulation layer, a MEMS resonator formed within the first semiconductor layer; and a complementary metal oxide semiconductor (CMOS) cover substrate bonded to the SOI substrate via one or more eutectic solder bonds that (i) implement respective paths of electrical conductivity between the CMOS cover substrate and the MEMS substrate, and (ii) hermetically seal the MEMS resonator within a chamber enclosed at least in part by the CMOS cover substrate and the second semiconductor layer of the SOI substrate. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40)
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Specification