SHIFT REGISTER UNIT, A SHIFT REGISTER, A DRIVING METHOD, AND AN ARRAY SUBSTRATE

• US 20170102814A1
• Filed: 07/13/2016
• Published: 04/13/2017
• Est. Priority Date: 10/10/2015
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Inventors: Cao, Xue, Luo, Xingyou, Xu, Rui, Chen, Xiaochuan, Chen, Xi, Ma, Lei, Cai, Peizhi, Li, Jinyu, Li, Yanchen, Pang, Fengchun
• Granted Patent: US 10,146,362 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/04184 Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G09G 2310/0245 Clearing or presetting the whole screen independently of waveforms, e.g. on power-on G09G2310/063 takes precedence
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0283 Arrangement of drivers for different directions of scanning
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence

Abstract

The disclosure provides a shift register unit, a shift register, a driving method and an array substrate. The shift register unit may comprise a touch-controlled circuit comprising a touch-controlled turning-on module and a touch-controlled turning-off module, wherein a control of the touch-controlled turning-on module is connected to a touch-controlled turning-on signal, an input is connected to a negative power supply signal, and an output is connected to an output terminal, and the touch-controlled turning-on signal is a pulse signal at a start of a touch controlling period; and a control of the touch-controlled turning-off module is connected to a touch-controlled turning-off signal, an input of the touch-controlled turning-off module is connected to a positive power supply signal, and an output of the touch-controlled turning-off module is connected to the output terminal, wherein the touch-controlled turning-off signal is a pulse signal at an end of the touch controlling period.

Claims

1. A shift register unit, comprising:

a gate line driving circuit configured to drive gate lines of a display panel to perform a progressive scanning, the gate line driving circuit comprises an inputting module, a resetting module, a pulling up module, a pulling down module and an outputting module; and

a touch-controlled circuit configured to determine whether the display panel is in a touch controlling stage or not, the touch-controlled circuit comprises a touch-controlled turning-on module and a touch-controlled turning-off module,

wherein a control of the touch-controlled turning-on module is connected to a touch-controlled turning-on signal, an input of the touch-controlled turning-on module is connected to a negative power supply signal, and an output of the touch-controlled turning-on module is connected to an output terminal, and the touch-controlled turning-on signal is a pulse signal at a start of a touch controlling period;

the touch-controlled turning-on module is configured to provide a negative voltage to the output terminal in response to receiving the touch-controlled turning-on signal, so as to cause the display panel in a touch controlling stage, wherein an output of the outputting module is used as the output terminal,

wherein a control of the touch-controlled turning-off module is connected to a touch-controlled turning-off signal, an input of the touch-controlled turning-off module is connected to a positive power supply signal, and an output of the touch-controlled turning-off module is connected to the output terminal, wherein the touch-controlled turning-off signal is a pulse signal at an end of the touch controlling period;

the touch-controlled turning-off module is configured to provide a positive voltage to the output terminal in response to receiving the touch-controlled turning-off signal, so as to cause the display panel in a displaying stage.

2. The shift register unit of claim 1, wherein the touch-controlled turning-on module comprises:

a first thin-film transistor, having a control being connected to the touch-controlled turning-on signal, an input being connected to the negative power supply signal, and an output being connected to the output terminal.

3. The shift register unit of claim 1, wherein the touch-controlled turning-off module comprises:

a second thin-film transistor, having a control being connected to the touch-controlled turning-off signal, an input being connected to the positive power supply signal, and an output being connected to the output terminal.

4. The shift register unit of claim 1, wherein the inputting module is configured to provide an input signal to a pulling up node when receiving the input signal or a second clock signal;

the outputting module is configured to provide a first clock signal to the output terminal when receiving a voltage signal at the pulling up node;

the resetting module is configured to provide the negative voltage to the pulling up node and the output terminal when receiving a resetting signal;

the pulling up module is configured to provide the second clock signal to a first pulling down node and a second pulling down node when receiving a high level of the second clock signal, and

the pulling down module is configured to provide the negative voltage to the output terminal when receiving the high level of the second clock signal, to provide the negative voltage to the first pulling down node and the second pulling down node when receiving the voltage signal at the pulling up node, and to provide the negative voltage to the pulling up node and the output terminal when receiving a voltage signal at the second pulling down node.

5. A shift register comprising a plurality of cascaded shift register units, wherein the shift register comprises at least one shift register unit of claim 1.

6. A shift register comprising a plurality of cascaded shift register units, wherein the shift register comprises at least one shift register unit of claim 2.

7. A shift register comprising a plurality of cascaded shift register units, wherein the shift register comprises at least one shift register unit of claim 3.

8. A shift register comprising a plurality of cascaded shift register units, wherein the shift register comprises at least one shift register unit of claim 4.

9. A shift register comprising a plurality of cascaded shift register units, wherein each of the plurality of cascaded shift register units is the shift register unit of claim 1.

10. A shift register comprising a plurality of cascaded shift register units, wherein each of the plurality of cascaded shift register units is the shift register unit of claim 2.

11. A shift register comprising a plurality of cascaded shift register units, wherein each of the plurality of cascaded shift register units is the shift register unit of claim 3.

12. A shift register comprising a plurality of cascaded shift register units, wherein each of the plurality of cascaded shift register units is the shift register unit of claim 4.

13. A gate driving apparatus on an array substrate, comprising the shift register of claim 5 and a driving module, wherein the driving module is configured to determine a touch controlling period according to a blanking period of a clock signal, and transmit a touch-controlled turning-on signal to a touch-controlled turning-on module when the touch controlling period starts, and a touch-controlled turning-off signal to a touch-controlled turning-off module when the touch controlling period ends.

14. A gate driving apparatus on an array substrate, comprising the shift register of claim 9 and a driving module, wherein the driving module is configured to determine a touch controlling period according to a blanking period of a clock signal, and transmit a touch-controlled turning-on signal to a touch-controlled turning-on module when the touch controlling period starts, and a touch-controlled turning-off signal to a touch-controlled turning-off module when the touch controlling period ends.

15. An array substrate comprising the gate driving apparatus on an array substrate of claim 13.

16. A display panel comprising the array substrate of claim 15.

17. A driving method for the shift register of claim 5, comprising:

providing, by a touch-controlled turning-on module, a negative power supply voltage to an output terminal in response to receiving a touch-controlled turning-on signal, at a start of a touch controlling period; and

providing, by a touch-controlled turning-off module, a positive power supply voltage to the output terminal in response to receiving a touch-controlled turning-off signal, at an end of the touch controlling period.

18. A driving method for the shift register of claim 9, comprising:

providing, by a touch-controlled turning-on module, a negative power supply voltage to an output terminal in response to receiving a touch-controlled turning-on signal, at a start of a touch controlling period; and

providing, by a touch-controlled turning-off module, a positive power supply voltage to the output terminal in response to receiving a touch-controlled turning-off signal, at an end of the touch controlling period.

19. The driving method of claim 17, comprising:

providing, by an inputting module, an input signal to a pulling up node when receiving the input signal or a second clock signal, during a displaying period;

providing, by an outputting module, a first clock signal to the output terminal when receiving a voltage signal at the pulling up node;

providing, by a resetting module, the negative power supply voltage to the pulling up node and the output terminal when receiving a resetting signal;

providing, by a pulling up module, the second clock signal to a first pulling down node and a second pulling down node when receiving a high level of the second clock signal; and

providing, by a pulling down module, the negative power supply voltage to the output terminal when receiving the high level of the second clock signal, the negative power supply voltage to the first pulling down node and the second pulling down node when receiving the voltage signal at the pulling up node, and the negative power supply voltage to the pulling up node and the output terminal when receiving a voltage signal at the second pulling down node.

20. The driving method of claim 18, comprising:

providing, by an inputting module, an input signal to a pulling up node when receiving the input signal or a second clock signal, during a displaying period;

providing, by an outputting module, a first clock signal to the output terminal when receiving a voltage signal at the pulling up node;

providing, by a resetting module, the negative power supply voltage to the pulling up node and the output terminal when receiving a resetting signal;

providing, by a pulling up module, the second clock signal to a first pulling down node and a second pulling down node when receiving a high level of the second clock signal; and

providing, by a pulling down module, the negative power supply voltage to the output terminal when receiving the high level of the second clock signal, the negative power supply voltage to the first pulling down node and the second pulling down node when receiving the voltage signal at the pulling up node, and the negative power supply voltage to the pulling up node and the output terminal when receiving a voltage signal at the second pulling down node.