NEURAL NETWORK UNIT WITH PLURALITY OF SELECTABLE OUTPUT FUNCTIONS
First Claim
1. A neural network unit, comprising:
- a register programmable with a control value;
a plurality of neural processing units (NPU), each comprising;
an arithmetic logic unit (ALU) that performs arithmetic and logical operations on a sequence of operands to generate a sequence of results; and
an accumulator into which the ALU accumulates the sequence of results as an accumulated value; and
a plurality of activation function units (AFU), each comprising;
a first module that performs a first function on the accumulated value to generate a first output;
a second module that performs a second function on the accumulated value to generate a second output, the first function is distinct from the second function; and
a multiplexer that receives the first and second outputs and selects one of the two outputs based on the control value programmed into the register.
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Accused Products
Abstract
A neural network unit includes a register programmable with a control value, a plurality of neural processing units (NPU), and a plurality of activation function units (AFU). Each NPU includes an arithmetic logic unit (ALU) that performs arithmetic and logical operations on a sequence of operands to generate a sequence of results and an accumulator into which the ALU accumulates the sequence of results as an accumulated value. Each AFU includes a first module that performs a first function on the accumulated value to generate a first output, a second module that performs a second function on the accumulated value to generate a second output, the first function is distinct from the second function, and a multiplexer that receives the first and second outputs and selects one of the two outputs based on the control value programmed into the register.
59 Citations
21 Claims
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1. A neural network unit, comprising:
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a register programmable with a control value; a plurality of neural processing units (NPU), each comprising; an arithmetic logic unit (ALU) that performs arithmetic and logical operations on a sequence of operands to generate a sequence of results; and an accumulator into which the ALU accumulates the sequence of results as an accumulated value; and a plurality of activation function units (AFU), each comprising; a first module that performs a first function on the accumulated value to generate a first output; a second module that performs a second function on the accumulated value to generate a second output, the first function is distinct from the second function; and a multiplexer that receives the first and second outputs and selects one of the two outputs based on the control value programmed into the register. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for operating a neural network unit having a plurality of neural processing units (NPU) and a plurality of activation function units (AFU), the method comprising:
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programming a register with a control value; by each of the plurality of NPUs; performing, by an arithmetic logic unit (ALU), arithmetic and logical operations on a sequence of operands to generate a sequence of results; and accumulating into an accumulator the sequence of results as an accumulated value; and by each of the plurality of AFUs; performing, by a first module, a first function on the accumulated value to generate a first output; performing, by a second module, a second function on the accumulated value to generate a second output, the first function is distinct from the second function; and selecting one of the first and second outputs based on the control value programmed into the register. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A computer program product encoded in at least one non-transitory computer usable medium for use with a computing device, the computer program product comprising:
computer usable program code embodied in said medium, for specifying a neural network unit, the computer usable program code comprising; first program code for specifying a register programmable with a control value; second program code for specifying a plurality of neural processing units (NPU), each comprising; an arithmetic logic unit (ALU) that performs arithmetic and logical operations on a sequence of operands to generate a sequence of results; and an accumulator into which the ALU accumulates the sequence of results as an accumulated value; and third program code for specifying a plurality of activation function units (AFU), each comprising; a first module that performs a first function on the accumulated value to generate a first output; a second module that performs a second function on the accumulated value to generate a second output, the first function is distinct from the second function; and a multiplexer that receives the first and second outputs and selects one of the two outputs based on the control value programmed into the register.
Specification