Systems and Methods for Sampling Data at a Non-Volatile Memory System

• US 20170109040A1
• Filed: 10/20/2015
• Published: 04/20/2017
• Est. Priority Date: 10/20/2015
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Aviala, Chris, Singidi, Harish, Koh, Anne Pao-LIng, Raghu, Deepak, Liang, Guirong, Lee, Dana, Dusija, Gautam
• Granted Patent: US 9,785,357 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters

Abstract

Systems and methods for sampling data at a non-volatile memory system are disclosed. In one implementation, a controller of a non-volatile memory system that is coupled with a host device acquires a read level voltage of a first word line of a memory block of a non-volatile memory of the non-volatile memory system. The controller accesses one or more lookup tables to determine an offset voltage for a second word line of the memory block based on a program/erase count and a read/disturb count associated with the memory block; applies the read level voltage and the offset voltage to the second word line to sample data stored at the memory block; and determines whether the data sampled from the memory block contains errors.

Claims

1. In a controller of a non-volatile memory system that is coupled with a host device, a method comprising:

acquiring a read level voltage of a first word line of a memory block of a non-volatile memory of the non-volatile memory system;

accessing one or more lookup tables to determine an offset voltage for a second word line of the memory block based on a program/erase count and a read/disturb count associated with the memory block;

applying the read level voltage and the offset voltage to the second word line to sample data stored at the memory block; and

determining whether the data sampled from the memory block contains errors.

2. The method of claim 1, wherein the memory block comprises single level memory cells.

3. The method of claim 1, further comprising:

in response to determining that the memory block does not contain errors, copying the data of the memory block to a new memory block.

4. The method of claim 3, wherein the new memory block comprises multi level memory cells.

5. The method of claim 4, wherein the multi level memory cells are triple level memory cells.

6. The method of claim 1, further comprising:

updating the one or more lookup tables to adjust the offset voltage between the first word line and the second word line.

7. The method of claim 6, wherein the one or more lookup tables are updated in response to a determination that a number of errors in the data stored at the memory block exceeds a threshold.

8. The method of claim 6, wherein the one or more lookup tables are updated periodically after a defined number of operations at the non-volatile memory system.

9. The method of claim 6, wherein updating the one or more lookup tables comprises:

acquiring a read level voltage relationship between the word lines of the memory block.

10. The method of claim 9, wherein empirical data collected at the non-volatile memory system is analyzed to acquire the read level voltage relationships between the word lines of the memory block.

19. The method of claim 6, wherein updating the one or more lookup tables comprises:

analyzing empirical data collected at the non-volatile memory system to acquire a read level voltage relationship between the first word line and the second word line of the memory block.

20. The method of claim 19, further comprising:

collecting the empirical data at the non-volatile memory system.

11. An apparatus comprising:

a non-volatile memory; and

a controller in communication with the non-volatile memory, the controller configured to;

acquire a read level voltage of a first word line of a memory block of the non-volatile memory;

determine an offset voltage for a second word line of the memory block based on one or more characteristics of the memory block; and

sample data stored at the memory block using the read level voltage and the offset voltage.

12. The apparatus of claim 11, wherein the one or more characteristics of the memory block comprises at least one of a life stage of the memory block, a program/erase count of the memory block, a program/disturb count of the memory block, a read/disturb count of the memory block, or a level of data retention of the memory block.

13. The apparatus of claim 11, wherein the controller is further configured to update the offset voltage between the first word line and the second word line of the memory block based on one or more characteristics of the memory block.

14. The apparatus of claim 13, wherein the controller is configured to update the offset voltage in response to a determination that a number of errors in the data sampled from the memory block exceeds a threshold.

15. The apparatus of claim 13, wherein the controller is configured to periodically update the offset voltage after a defined number of operations at the non-volatile memory system.

16. In a controller of a non-volatile memory system that is coupled with a host device, a method comprising:

updating one or more lookup tables to reflect a relationship between a read level voltage of a first word line of a memory block of a non-volatile memory of the non-volatile memory system and a read level voltage of a second word line of the memory block;

wherein the relationship between the read level voltage of the first word line and the read level voltage of the second word line is updated based on at least one of a life stage of the memory block, a program/erase count of the memory block, a program/disturb count of the memory block, a read/disturb count of the memory block, or a level of data retention of the memory block.

17. The method of claim 16, wherein the one or more lookup tables are updated in response to a determination that a number of errors in data stored at the memory block exceeds a threshold.

18. The method of claim 16, wherein the one or more lookup tables are updated periodically after a defined number of operations at the non-volatile memory system.