THIN FILM TRANSISTOR SUBSTRATE AND ORGANIC LIGHT-EMITTING DISPLAY USING THE SAME

• US 20170110528A1
• Filed: 06/30/2016
• Published: 04/20/2017
• Est. Priority Date: 10/16/2015
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kim, Eunhyun, Kim, Taeyoung, Yang, Shinhyuk, Park, Hyehyang
• Granted Patent: US 10,950,678 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs

Abstract

A thin film transistor substrate that includes a substrate, a lower gate electrode arranged on the substrate, a semiconductor layer arranged on the substrate and overlapping the lower gate electrode, the semiconductor layer including a channel region interposed between a source region and a drain region, and an upper gate electrode arranged on the substrate and overlapping the semiconductor layer, the upper gate electrode being arranged on an opposite side of the semiconductor layer than the lower gate electrode, wherein at least one of the lower gate electrode and the upper gate electrode is perforated by an aperture to reduce a parasitic capacitance between the upper and lower gate electrodes.

Claims

1. A thin film transistor substrate, comprising:

a substrate;

a lower gate electrode arranged over the substrate;

a semiconductor layer arranged over the substrate and overlapping the lower gate electrode, the semiconductor layer including a channel region interposed between a source region and a drain region; and

an upper gate electrode arranged over the semiconductor layer and overlapping the semiconductor layer and the lower gate electrode, wherein at least one of the lower gate electrode and the upper gate electrode is perforated by a through hole.

2. The thin film transistor substrate of claim 1, wherein the through hole does not overlap the semiconductor layer.

3. The thin film transistor substrate of claim 1, wherein the lower gate electrode has a larger area when viewed from a top side than the upper gate electrode.

4. The thin film transistor substrate of claim 3, wherein an area of overlap between the lower gate electrode and the channel region is greater than an area of overlap between the upper gate electrode and the channel region.

5. The thin film transistor substrate of claim 1, wherein the through hole is filled with an insulating material.

6. The thin film transistor substrate of claim 1, wherein an electric potential of the lower gate electrode is different from that of the upper gate electrode by being independently controlled.

7. The thin film transistor substrate of claim 6, further comprising:

a gate control line arranged over the substrate and connected to the lower gate electrode; and

a threshold voltage compensation line arranged over the substrate and connected to the upper gate electrode.

8. The thin film transistor substrate of claim 1, further comprising:

a source electrode connected to the source region; and

a drain electrode connected to the drain region, wherein the upper gate electrode does not overlap any of the source and drain electrodes.

9. The thin film transistor substrate of claim 1, wherein:

the upper gate electrode is perforated by a first through hole, and

the lower gate electrode is perforated by a second through hole, wherein the first through hole and the second through hole do not overlap each other.

10. The thin film substrate of claim 3, the semiconductor layer being comprised of a material selected from a group consisting of indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), SnO₂, In₂O₃, ZnO, CdO, Cd₂SnO₄, and TiO₂, the lower gate electrode to prevent light transmitted through the substrate from reaching the semiconductor layer.

11. An organic light-emitting display apparatus comprising a plurality of pixels over a substrate, wherein each of the pixels comprises:

a switching thin film transistor arranged over the substrate;

a driving thin film transistor arranged over the substrate and electrically connected to the switching thin film transistor;

a pixel electrode connected to the driving thin film transistor;

an emission layer arranged over the pixel electrode; and

an opposite electrode facing the pixel electrode, the emission layer being interposed between the pixel electrode and the opposite electrode, wherein the driving thin film transistor comprises;

a lower gate electrode arranged over the substrate;

a semiconductor layer arranged over the substrate and overlapping the lower gate electrode, the semiconductor layer including a channel region interposed between a source region and a drain region; and

an upper gate electrode arranged over the semiconductor layer and overlapping the semiconductor layer and the lower gate electrode,

wherein at least one of the lower gate electrode and the upper gate electrode is perforated by an aperture.

12. The organic light-emitting display apparatus of claim 11, wherein the aperture is not arranged at a location that corresponds to the semiconductor layer.

13. The organic light-emitting display apparatus of claim 11, wherein the lower gate electrode covers a larger area of the display apparatus than the upper gate electrode.

14. The organic light-emitting display apparatus of claim 13, wherein an area of overlap between the lower gate electrode and the channel region is greater than an area of overlap between the upper gate electrode and the channel region.

15. The organic light-emitting display apparatus of claim 11, wherein the aperture is filled with an insulating material.

16. The organic light-emitting display apparatus of claim 11, wherein a potential of the lower gate electrode differs from that of the upper gate electrode by being independently controlled.

17. The organic light-emitting display apparatus of claim 16, further comprising:

a gate control line arranged over the substrate and connected to the lower gate electrode; and

a threshold voltage compensation line arranged over the substrate and connected to the upper gate electrode.

18. The organic light-emitting display apparatus of claim 11, further comprising:

a source electrode connected to the source region; and

a drain electrode connected to the drain region, wherein the upper gate electrode does not overlap any of the source and drain electrodes.

19. The organic light-emitting display apparatus of claim 11, wherein:

the upper gate electrode is perforated by a first aperture, and

the lower gate electrode is perforated by a second aperture, wherein the first aperture and the second aperture do not overlap each other.

20. The organic light-emitting display apparatus of claim 13, the semiconductor layer being comprised of an oxide material having an element selected from a group including indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf) cadmium (Cd), germanium (Ge), and zinc (Zn), the lower gate electrode to prevent light transmitted through the substrate from reaching the semiconductor layer.