SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

• US 20170113922A1
• Filed: 10/27/2015
• Published: 04/27/2017
• Est. Priority Date: 10/27/2015
• Status: Active Grant

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: TSAI, Yu-Hsuan, HUANG, Ching-Han, CHAN, Hsun-Wei
• Granted Patent: US 9,850,124 B2
• Time in Patent Office: Days
• CPC Class Codes: B81B 2201/0292 Sensors not provided for in B81B2201/0207 - B81B2201/0285
• CPC Class Codes: B81B 7/0067 for controlling the passage of optical signals through the package
• CPC Class Codes: B81C 1/00317 Packaging optical devices
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/16151 Cap comprising an aperture, e.g. for pressure control, encapsulation
• CPC Class Codes: H01L 2924/16195 Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 31/0203 Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80

Abstract

A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.

Claims

1. A semiconductor device package, comprising:

a carrier;

a sensor element disposed on or within the carrier; and

a cover comprising;

a base substrate comprising an inner sidewall defining a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; and

a periphery barrier coupled to the bottom surface of the base substrate and disposed on a top surface of the carrier; and

a filter disposed on the top surface of the base substrate and covering the penetrating hole;

wherein at least a portion of the inner sidewall of the base substrate is tilted.

2. The semiconductor device package according to claim 1, wherein the at least a portion of the inner sidewall of the base substrate is tilted at an angle of between about 10°

to less than about 90°

, relative to the top surface of the base substrate.

3. The semiconductor device package according to claim 1, wherein the at least a portion of the inner sidewall of the base substrate is tilted at an angle of between about 30°

to about 60°

, relative to the top surface of the base substrate.

4. The semiconductor device package according to claim 1, wherein the at least a portion of the inner sidewall of the base substrate is tilted at an angle of between about 40°

to about 50°

, relative to the top surface of the base substrate.

5. The semiconductor device package according to claim 1, wherein an upper portion of the inner sidewall of the base substrate is substantially perpendicular to the top surface of the base substrate, and a lower portion of the inner sidewall of the base substrate is tilted.

6. The semiconductor device package according to claim 1, wherein the entire inner sidewall of the base substrate is tilted.

7. The semiconductor device package according to claim 1, wherein the cover further comprises a portion protruding from the top surface of the base substrate, and the protruding portion of the cover comprises an inner sidewall defining a space to accommodate the filter.

8. The semiconductor device package according to claim 7, further comprising an adhesive is filled in the space defined by the inner sidewall of the protruding portion of the cover.

9. The semiconductor device package according to claim 8, wherein the adhesive comprises conductive fillers selected from carbon black, metal particles, metal-coated particles, or a combination thereof.

10. The semiconductor device package according to claim 7, wherein the inner sidewall of the protruding portion is tilted.

11. The semiconductor device package according to claim 10, wherein the inner sidewall of the protruding portion is tilted at an angle of between about 10°

to less than about 90°

, relative to the top surface of the base substrate.

12. The semiconductor device package according to claim 10, wherein the inner sidewall of the protruding portion is tilted at an angle of between about 30°

to about 60°

, relative to the top surface of the base substrate.

13. The semiconductor device package according to claim 10, wherein the inner sidewall of the protruding portion is tilted at an angle of between about 40°

to about 50°

, relative to the top surface of the base substrate.

14. The semiconductor device package according to claim 1, wherein the inner sidewall of the base substrate of the cover and at least one of the bottom surface and the top surface of the base substrate of the cover are light reflection surfaces.

15. The semiconductor device package according to claim 14, wherein the cover is a plastic cover and the light reflection surfaces are coated with a reflective material.

16. The semiconductor device package according to claim 14, wherein the cover is a metal cover.

17. A method of manufacturing a semiconductor device package comprising:

providing a carrier having a sensor element disposed thereon;

attaching a cover to the carrier, the cover including a base substrate defining a penetrating hole, the cover further including a periphery barrier, wherein the cover is positioned on the carrier such that the periphery barrier of the cover is disposed on a top surface of the carrier; and

attaching a filter to a top surface of the base substrate of the cover such that the filter covers the penetrating hole.

18. The method according to claim 17, wherein the filter is attached to the top surface of the base substrate by an adhesive.

19. The method according to claim 17, wherein the cover further comprises a portion protruding from the top surface of the base substrate, and the protruding portion of the cover comprises an inner sidewall defining a space to accommodate the filter.

20. The method according to claim 19, wherein the filter is attached to the top surface of the base substrate by an adhesive filled in the space.