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TEST PARTITION EXTERNAL INPUT/OUTPUT INTERFACE CONTROL

  • US 20170115338A1
  • Filed: 10/27/2016
  • Published: 04/27/2017
  • Est. Priority Date: 10/27/2015
  • Status: Active Application
First Claim
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1. A chip test system comprising:

  • a test partition configured to perform test operations;

    a centralized test controller for controlling testing by the test partition; and

    a test link interface controller configured to communicate between the centralized test controller and the test partition, wherein the test link interface controller controls dynamic changes to external pads associated with the test operations.

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