DATA STORAGE DEVICE AND DATA MAINTENANCE METHOD THEREOF

• US 20170115933A1
• Filed: 10/03/2016
• Published: 04/27/2017
• Est. Priority Date: 10/22/2015
• Status: Active Grant

• Current Assignee: Silicon Motion Incorporated California (Silicon Motion)
• Original Assignee: Silicon Motion Incorporated California (Silicon Motion)
• Inventors: LIN, Chien-Cheng, LEE, Jie-Hao
• Granted Patent: US 10,013,210 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 2212/1024 Latency reduction
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

The present invention provides a data storage device including a flash memory and a controller. The controller equally distributes the TLC-data blocks into three regions. In a first stage, the controller determines a first TLC-data block corresponding to the logic address of a prewrite data sector, defines the region that contains the first TLC-data block as a first region, and determines whether the first TLC-data block has valid data. When the first TLC-data block does not have valid data, the controller selects a second TLC-data block and a third TLC-data block from the regions other than the first region for writing the prewrite data sector, into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode.

Claims

1. A data storage device, comprising:

a flash memory, having a plurality of SLC-spare blocks, a plurality of TLC-data blocks, and a plurality of TLC-spare blocks; and

a controller, equally distributing the TLC-data blocks into three regions, the regions have the same number of TLC-data blocks, the controller further receives a prewrite data sector and a logic address of the prewrite data sector, and obtains a first sub-prewrite data sector, a second sub-prewrite data sector and a third sub-prewrite data sector according to the prewrite data sector and the logic address, wherein in a first stage, the controller further determines a first TLC-data block corresponding to the logic address according to the logic address, defines the region that contains the first TLC-data block as a first region, and determines whether the first TLC-data block has valid data, wherein in the first state, when the first TLC-data block does not have valid data, the controller respectively selects a second TLC-data block and a third TLC-data block from the regions other than the first region according to the first TLC-data block, respectively writes the first sub-prewrite data sector, the second sub-prewrite data sector and the third sub-prewrite data sector into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode, and maps the first TLC-data block, the second TLC-data block and the third TLC-data block to the logic address.

2. The data storage device as claimed in claim 1, wherein total number of TLC-data blocks is N, each of the TLC-data blocks has an address, and the addresses of the TLC-data blocks are in sequence.

3. The data storage device as claimed in claim 2, wherein the address of the first TLC-data block plus N/3 is equal to the address of the second TLC-data block, the address of the first TLC-data block plus (2N)/3 is equal to the addresses of the third TLC-data block.

4. The data storage device as claimed in claim 1, wherein in a second stage, the controller further programs the data in the first TLC-data block, the second TLC-data block and the third TLC-data block into one of the TLC-spare blocks, wherein the controller selects a first TLC-spare block from the TLC-spare blocks to program the data of the first TLC-data block, the second TLC-data block and the third TLC-data block, which are mapped to the logic address, into the first TLC-spare block by a TLC storage mode, maps the first TLC-spare block to the logic address, and releases the first TLC-data block, the second TLC-data block and the third TLC-data block.

5. The data storage device as claimed in claim 4, wherein the first stage is Production Phase, the second stage is Integration Phase after the first stage, and the data storage device goes through a high temperature soldering event between the first stage and the second stage.

6. The data storage device as claimed in claim 4, wherein the step of programming the data in the first TLC-data block, the second TLC-data block and the third TLC-data block into the first TLC-spare block by the TLC storage mode is performed in the second stage and interlocked with a write operation indicated by a user command.

7. The data storage device as claimed in claim 1, wherein in a second stage, the controller further receives an user-write-command, and determines whether a specific TLC-data block of a specific logic address indicated by the user-write-command has the prewrite data sector according to the user-write-command.

8. The data storage device as claimed in claim 7, wherein when the specific TLC-data block has the prewrite data sector, the controller obtains a second logic address that maps to the specific TLC-data block corresponding to the specific logic address, selects a second TLC-spare block from the TLC-spare pool, programs data in the specific TLC-data block and the other two TLC-data blocks that are mapped to the second logic address into the second TLC-spare block by a TLC storage mode to release the specific TLC-data block and the other two TLC-data blocks that are mapped to the second logic address.

9. A data maintenance method, applied to a data storage device having a plurality of SLC-spare blocks, a plurality of TLC-data blocks, and a plurality of TLC-spare blocks, the data maintenance method comprising:

receiving a prewrite data sector and a logic address of the prewrite data sector, and obtaining a first sub-prewrite data sector, a second sub-prewrite data sector and a third sub-prewrite data sector according to the prewrite data sector and the logic address;

writing a prewrite data sector into at least one of the TLC-data blocks according to the logic address in a first stage, wherein the step of writing the prewrite data sector into the at least one of the TLC-data blocks according to the logic address further comprises;

equally distributing the TLC-data blocks into three regions, wherein the regions have the same number of TLC-data blocks;

determining a first TLC-data block corresponding to the logic address according to the logic address, and defining the region that contains the first TLC-data block as a first region;

determining whether the first TLC-data block has valid data;

selecting a second TLC-data block and a third TLC-data block, respectively, from the regions other than the first region according to the first TLC-data block when the first TLC-data block does not have valid data;

respectively writing the first sub-prewrite data sector, the second sub-prewrite data sector and the third sub-prewrite data sector into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode; and

mapping the first TLC-data block, the second TLC-data block and the third TLC-data block to the logic address.

10. The data maintenance method as claimed in claim 9, wherein total number of TLC-data blocks is N, each of the TLC-data blocks has an address, and the addresses of the TLC-data blocks are in sequence.

11. The data maintenance method as claimed in claim 10, wherein the address of the first TLC-data block plus N/3 is equal to the address of the second TLC-data block, the address of the first TLC-data block plus (2N)/3 is equal to the addresses of the third TLC-data block.

12. The data maintenance method as claimed in claim 9, further comprising:

programming the data in the first TLC-data block, the second TLC-data block and the third TLC-data block into one of the TLC-spare blocks in a second stage, wherein the step of programming the data in the first TLC-data block, the second TLC-data block and the third TLC-data block into one of the TLC-spare blocks further comprises;

selecting a first TLC-spare block from the TLC-spare blocks;

programming the data of the first TLC-data block, the second TLC-data block and the third TLC-data block, which are mapped to the logic address, into the first TLC-spare block by a TLC storage mode;

mapping the first TLC-spare block to the logic address; and

releasing the first TLC-data block, the second TLC-data block and the third TLC-data block.

13. The data maintenance method as claimed in claim 12, wherein the first stage is Production Phase, the second stage is Integration Phase after the first stage, and the data storage device goes through a high temperature soldering event between the first stage and the second stage.

14. The data maintenance method as claimed in claim 12, wherein the step of programming the data in the first TLC-data block, the second TLC-data block and the third TLC-data block into the first TLC-spare block by the TLC storage mode is performed in the second stage and interlocked with a write operation indicated by a user command.

15. The data maintenance method as claimed in claim 9, further comprising:

receiving an user-write-command in a second stage; and

determining whether a specific TLC-data block of a specific logic address indicated by the user-write-command has the prewrite data sector according to the user-write-command.

16. The data maintenance method as claimed in claim 15, further comprising:

obtaining a second logic address that maps to the specific TLC-data block corresponding to the specific logic address when the specific TLC-data block has the prewrite data sector;

selecting a second TLC-spare block from the TLC-spare pool; and

programming data in the specific TLC-data block and the other two TLC-data blocks that are mapped to the second logic address into the second TLC-spare block by a TLC storage mode to release the specific TLC-data block and the other two TLC-data blocks that are mapped to the second logic address.