DATA CENTER MANAGEMENT VIA OUT-OF-BAND, LOW-PIN COUNT, EXTERNAL ACCESS TO LOCAL MOTHERBOARD MONITORING AND CONTROL

• US 20170116103A1
• Filed: 01/06/2017
• Published: 04/27/2017
• Est. Priority Date: 03/09/2015
• Status: Active Grant

• Current Assignee: Vapor Corp.
• Original Assignee: Vapor Corp.
• Inventors: White, Steven, Crawford, Colton Malone, Cencini, Andrew Brian
• Granted Patent: US 10,817,398 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 1/189 Power distribution
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 11/3027 where the computing system component is a bus
• CPC Class Codes: G06F 11/3048 where the topology of the computing system or computing system component explicitly influences the monitoring activity, e.g. serial, hierarchical systems
• CPC Class Codes: G06F 11/3051 Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs verification or detection of system hardware configuration G06F11/2247
• CPC Class Codes: G06F 11/3055 Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available error or fault processing without redundancy G06F11/0703; error detection or correction by redundancy in data representation G06F11/08; error detection or correction by redundancy in operation G06F11/14; error detection or correction by redundancy in hardware G06F11/16
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: H04L 41/24 using dedicated network management hardware
• CPC Class Codes: H04L 41/344 Out-of-band transfers
• CPC Class Codes: H04L 67/1042 using topology management mechanisms

Abstract

Provided is an external secondary computing device configured to monitor or control a rack-mounted computing device independently of whether the rack-mounted computing device is operating or is turned off via a low-pin-count motherboard bus independently of a baseboard management controller.

Claims

1. A secondary computing device configured to monitor or control a rack-mounted computing device independently of whether the rack-mounted computing device is operating or is turned off, the secondary computing device comprising:

a low-bandwidth bus connector configured to connect to a low-bandwidth bus on a motherboard of a rack-mounted computing device; and

an off-motherboard microcontroller electrically coupled to the low-bandwidth bus connector, the microcontroller comprising one or more processors and memory storing instructions that, when executed by at least some of the processors, effectuate operations comprising;

receiving, with an off-motherboard network interface, via an out-of-band network, a first command from computing device configured to monitor or control a plurality of rack-mounted computing devices;

sending a second command based on the first command via the connector to an electronic device coupled to the low-bandwidth bus on the motherboard;

receiving a response to the second command via the low-bandwidth bus from the electronic device; and

transmitting data based on the response, with the off-motherboard network interface, via the out-of-band network, to the computing device configured to monitor or control a plurality of rack-mounted computing devices.

2. The secondary computing device of claim 1, wherein:

the low-bandwidth bus is a System Management Bus (SMBus) connector coupled to an SMBus on the motherboard and is a removable connector configured;

to be held in place on the motherboard, at least in part, by a resilient member; and

to connect to the SMBus via electrical contact with five or fewer conductors, a first conductor of the five or fewer conductors being a clock-signal conductor, a second conductor of the five or fewer conductors being a data conductor, the clock-signal conductor being configured to receive a clock-signal operating at less than 10 MHz.

3. The secondary computing device of claim 1, comprising:

the off-motherboard network interface communicatively coupled to the one or more processors.

4. The secondary computing device of claim 3, wherein:

the off-motherboard network interface comprises an Ethernet network interface.

5. The secondary computing device of claim 3, wherein:

the off-motherboard network interface comprises a powerline communication modem.

6. The secondary computing device of claim 5, comprising:

a bus-bar connector configured to couple to a bus bar extending past, and providing direct current power to, a plurality of rack-mounted computing devices; and

a filter configured to separate a data signal from direct current power conducted by the bus bar.

7. The secondary computing device of claim 1, wherein the operations comprise:

adjusting a fan speed of a fan controlled via the motherboard by disengaging control of the fan by the rack-mounted computing device and sending a pulse-width modulated signal having a duty cycle corresponding to a target fan speed.

8. The secondary computing device of claim 1, wherein the operations comprise:

reading a value from a motherboard temperature sensor indicative of a temperature of a component on the motherboard.

9. The secondary computing device of claim 1, wherein the operations comprise:

reading a value from a motherboard voltage sensor indicative of a voltage of a conductive trace of the motherboard.

10. The secondary computing device of claim 1, wherein the operations comprise:

turning off the rack-mounted computing device; and

turning on the rack-mounted computing device.

11. The secondary computing device of claim 1, wherein the operations comprise:

scanning an address space of the low-bandwidth bus; and

compiling an inventory of responsive electronic devices based on acknowledgement signals sent by electronic devices upon a respective signal being sent to the respective electronic device'"'"'s address on the low-bandwidth bus during the scanning.

12. The secondary computing device of claim 1, wherein the operations comprise:

determining an identity of the electronic device by probing a register address space of the electronic device to obtain an identifier.

13. The secondary computing device of claim 1, wherein:

the second command is sent via only one electrically conductive path between the off-board microcontroller and the low-bandwidth bus connector.

14. The secondary computing device of claim 1, wherein:

the off-board microcontroller is configured to monitor and control a plurality of electronic devices on the motherboard solely via the low-bandwidth bus, without controlling or monitoring the plurality of electronic devices via other busses on the motherboard.

15. The secondary computing device of claim 1, wherein:

the microcontroller is configured to read a value from register of the electronic device via the low-bandwidth bus when the rack-mounted computing device is turned off.

16. The secondary computing device of claim 1, wherein sending the second command comprises, on a given conductor coupled to the low-bandwidth bus connector, in sequence:

transmitting a start bit;

transmitting seven bits in sequence encoding an address of the electronic device on the low-bandwidth bus;

transmitting a value indicating a write operation;

receiving a first acknowledgement bit from the electronic device;

transmitting eight bits in sequence encoding a command code;

receiving a second acknowledgement bit from the electronic device;

transmitting eight bits in sequence encoding data sent to the electronic device.

17. The secondary computing device of claim 1, comprising:

means for taking inventory of electronic devices coupled to the low-bandwidth bus;

means for controlling a motherboard fan speed;

means for communicating via the out-of-band network;

means for monitoring or controlling the rack-mounted computing device without relying on a baseboard management controller of the rack-mounted computing device.

18. The secondary computing device of claim 1, comprising:

a rack configured to hold a plurality of secondary computing devices, including a given secondary computing device including the low-bandwidth bus connector and the microcontroller;

a rack-specific network configured to couple to each of the secondary computing devices held by the rack; and

a rack-control unit configured to control and monitor rack-mounted computing devices in the rack via the rack-specific network and the plurality of secondary computing devices.

19. The secondary computing device of claim 1, comprising:

a rack-mounted computing device coupled to the low-bandwidth bus connector.

20. The secondary computing device of claim 19, wherein:

the rack-mounted computing device comprises memory storing instructions that provide a service via the Internet to a client computing device or a service to other rack-mounted computing devices.

21. The secondary computing device of claim 1, wherein:

the low-bandwidth bus is an Intelligent Platform Management Bus (IPMB).

22. The secondary computing device of claim 1, wherein:

the low-bandwidth bus is a Power Management Bus (PMBus).